Development Of Integreated Data And Information Processing Platform

With the rapid development of Soft-Defined Radio and electronic technology,the demand of the data processing platform with excellent performance and function has been urgently raised.With high real-time,strong processing ability,rich interface,strong expansibility,the universal parallel processing platform has become the main trend of development,and are used in fields of the speech,radar,communication navitigation and so on.In this thesis,based the development of processing platform and main devices and software of the status quo and features is discussed.Then an integrated data and information processing platform based on PowerPC+FPGA+fixed DSP+float DSP architectures and engineering is developed successfully,and confirmed the feasibility of the design.The hardware structure and composition,communication mode,embeddedsoftware and Verification means of the processing platform is proposed:1.According to the requirements of processing platform,with PowerPC for the external network communication,DSP for processing algorithm,FPGA for high-speed communication and control,the optimal universal parallel processing platform is constructed.The hardware configuration of four processors,external memory expansion,network interface,UART interface,SRIO interface,reset,clock,power supply and control circuit are designed in detail.2.With external network as control channel,SRIO as high-speed data transmission channel,internal HPI as control channel,and FPGA's dual port as data exchange channel,the communication mode of processing platform is proposed.Then avoid the low-speed command of the long-term occupation of processing bandwidth,interrupt the occurrence of high-speed communication.3.Verification means of the data and information processing platform is proposed.Using the processor hardware development environment and software development platform,verified function and interface of processor,completed the remote update and dynamic loading,build and verify data high-speed communication between DSP and FPGA.