The Application Study Of System On A Programmable Chip In Signal Deinterleaving And Recognizing Based On PowerPC

With the rapid development of chip technologies, more and more technologies are applied in the area of digital processing. In hardware design, more and more complex algorithms are widely utilized. Traditionally the Digital Signal Processor (DSP) is usually used in digital signal processing. With the development of Programmable Logic Device (PLD), embedded Microprocessor in PLD, now the Field Programmable Gate Array (FPGA) has the ability to process mass data. For example, FPGA can run large-point Fast Fourier Transform algorithm (FFT). And the performances of FPGA, such as the area, speed, flexibility, are superior to DSP's. These characters of FPGA meet the demand for development of electronic reconnaissance equipment with miniature, low power consumption, lightweight and high reliable. Meanwhile, System On a Programmable Chip (SOPC), as a special embedded system applied on FPGA, has many advantages, such as design flexible, shorted development time, re-programmable, reducibility, expandable, re-configurable, upgradable, etc. Because of these, SOPC is used in many areas, such as communication, aviation, industry control, etc.Based on the PowerPC405-embedded FPGA and the algorithm for deinterleaving and recognizing of radar signal, we implement an embedded system by using Integrate Software Environment (ISE) and Embedded Development Kit (EDK). We have tested the system using classic, frequency-agile, jittered and staggered PRI radar signals, and obtained a satisfactory result. This technique of design that in only one chip solves the problem which need to process in many Printed Circuit Boards (PCB), so as to simplify system architecture, compact equipment, save developing cost and time, and laying a foundation for implementing signal preprocessing and main processing in a single chip.First, we discuss the algorithm of deinterleaving and recognizing of radar signal, introduce the architecture of FPGA based on Virtex-II Pro, in which PowerPC405 is embedded. Then we introduce the using of EDK and ISE. Finally, Using Virtex-II Pro, we design and implement an embedded system for deinterleaving and recognizing radar signals. Also we simulate and test some modules of the system.