The Design And Realization Of System-level Verification For Powerpc E200Based SoC System

With the rapid development of Integrated Circuit(IC) manufacturing process, thechip integration has intensified. As the famous Moore’s Law said, the number oftransistors on a chip doubles every18months, so does its performance. So,System-on-Chip(SoC) becomes an inevitable trend of IC design. SoC is a completesystem functionality implemented on a single chip which combines several technics.SoC increases the scope of the design and development process and the demand forfunctional verification. The complexity of the verification work and workload riseexponentially. Therefore, it’s crutial to find errors timely and ensure the SoC is correct.CPU core is the key part of SoC. Because of its increasingly complex architecture, theverification of CPU core has become the key to the entire SoC verification.As a member of Freescale e200series processors, e200z6is a PowerPC Book Ebased low-cost version of processor and applied to embedded control system whichpays more attention to cost than performance.This article is aimed to verify a SoC design based on PowerPC e200z6. Giving thate200z6is a soft core and CPU core is the key part of SoC, this verification work isdivided into two parts: verify e200z6core and verify entire SoC.To verify e200z6core, this article designed test programs and verified the corethrough system-level verification. The core test programs contain four categories: basictest programs, memory test programs, debug test programs and Cache test programs.This process covers all the key modules of the core, providing a guarantee for theestablishment of a minimum system.To verify the e200z6based SoC, this article designed test programs and verifiedthe SoC through both system-level verification and rapid prototype verification. TheSoC test programs contain two categories due to the peripherals.At last, we proved that this SoC design meets the requirements and could bedeveloped further.