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The Research And Design Of General-purpose Float-point Processor In Multi-core System

Posted on:2018-10-19Degree:MasterType:Thesis
Country:ChinaCandidate:B ZhangFull Text:PDF
GTID:2348330512979941Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
The traditional way which relies on superscalar and super-pipeline to improve the performance of processor encounters bottleneck with the rapid development of integrated circuit and computer technology, multi-core SoC (System on Chip, SoC) technology comes into being, the direction of the processor development has gradually from the pursuit of a single core with higher frequency to the pursuit of more processor cores. NoC(Network on Chip) applies parallel computing technology and computer networks into chip and has become one significant way for inter-chip interconnect, it has a greater advantage in terms of bandwidth, scalability and reliability. At the same time, the data processing accuracy and real-time requirements are increasingly high in the field of digital communication, image processing, scientific computing and so on, hardware system need to have strong floating-point computing capabilities.Based on the multi-core system architecture of the research group, this thesis designs a general-purpose floating-point processor and builds an multi-core system for high-density computing domain after studying the multi-core processor technology, network on chip technology and online debugging technology. The main work of this thesis is as follows:First of all, the overall architecture of the general-purpose floating-point processor is determined according to the algorithm features and functional requirements in the high-density computing domain. In order to deal with data-intensive and computation-intensive algorithms, the general-purpose floating-point processor are compatible with both storage and streaming computation modes in order to maximize computational efficiency and algorithm adaptability, while adding a pulsating mode to compromise flexibility and efficiency.Secondly, the structure and working mechanism of microcontroller, register group,memory unit, network interface and online debugging unit are determined and the RTL design of the general-purpose floating-point processor has been realized.Finally, this thesis builds an multi-core system based on NoC and verifies the function correctness, algorithm adaptability and debug ability through loading vector computing, matrix feature decomposition, matrix multiplication and FFT experiments.
Keywords/Search Tags:Multi-core system, Network on chip, General-purpose floating-point processor, High-density computing, RTL design
PDF Full Text Request
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