The Input And Output Interface Circuit Design Of High-speed ADC

With the increasing frequency of electronic systems, wireless communications, radar,software, radio and other applications are constantly pushing forward A/D converter to move closer to the RF side, ADC performance has become a bottleneck to improve machine performance, the input and output interface technology is an important part of the design of high-performance ADC, has become the focus of research.Firstly, the input signal integrity problem, reflection, crosstalk, signal jitter, EMI noise and loss of high frequency signal are analyzed. The reason of its formation is analyzed and the corresponding solutions are given from the aspects of circuit module design, device size, layout and routing.Secondly, it analyzes the factors that need to be considered in the input interface design, and then carry out the corresponding design,these factors include input impedance, input drive level, bandwidth and passband flatness, signal to noise ratio(SNR) and distortion. In order to deal with the input signal integrity problem, the input impedance matching circuit is designed,including digital control module, switch resistance network, comparator circuit, the precise matching of the resistor is realized,and the reflection of the signal is reduced;In order to improve the linearity and bandwidth of the signal, the input buffer circuit design,to achieve the high-speed transmission of the signal. Based on the TSMC 0.18?m CMOS process, the circuit design and simulation using Cadence Spectre.The simulation results show that the impedance matching circuit can stabilize the resistance value at 100?±1.43%, and the input buffer circuit SFDR is 86.90dB, the bandwidth can reach 3.6GHz, which meets the design requirements.Then, the development of output interface circuit is analyzed, and the design of output interface circuit based on LVDS technology is introduced, which includes driving circuit, common mode feedback circuit, reference circuit and buffer circuit. This design takes into account power consumption, area, performance and many other factors,increased pre-charge and discharge technology, negative feedback clamping technology and skew adjustment technology and so on. In this paper, the output interface circuit is simulated,the simulation results show that the LVDS output signal is stable at about 300mV above and above the common mode level, and the duty ratio is 48%, which satisfies the design requirement, under the condition that the input signal is 1GHz and the power supply voltage is 1.8V.Finally, according to the layout design rules, some problems that may be encountered in the design process are analyzed, such as crosstalk, noise, matching, latch up effect and antenna effect.Completed the LVDS output interface circuit layout design and verification.