IBIS Modeling And Simulation Method For Signal Integrity

Deep submicron circuit design brings lots of challenges. When come to signal integrity, digital signal can not be simply treated as logic"1"or"0". It is useful to describe them as analog signal. But simulation on transistor level is time-consuming which can not be used on system level.Some basic concepts in IBIS are reviewed in this paper. The process to generate and verify an IBIS output model for a DDR-SDRAM which works on 1 GHz is described. A simulation method is proposed to eliminate the double count of company capacitance in transient simulation. Transition time should be considered when the signal transfer through transmission line, it brings slope to input signals. In this paper, a novel circuit structure is introduced which can improve the accuracy of the non ideal input IBIS simulation.