Study Of Charge Trapping Mechanism In OFET Nonvolatile Memories

Organic electronics and organic electronic devices have made considerable progress during the past decades in a number of application areas. There are extensive application prospects for organic electronic devices, such as organic field-effect transistors (OFETs), organic light-emitting diodes (OLEDs), organic solar cells (OSCs), and photochemical sensors. OFETs and OFET nonvolatile memories show a huge potential in the application field of optical transistor array, smart cards, sensors, electronic paper and large-area electronic skin, due to its advantages of simple fabrication process, low cost, light weight, flexibility and arbitrary large-area manufacturing. Many high-performance organic semiconductors have reached the traditional inorganic semiconductors in terms of field-effect mobility, which make it possible to the industrialization from the fundamental research.OFET based nonvolatile memory (hereafter referred to as "organic transistor memory") is a kind of organic memory device with most extensive application prospect, which operates in the advantageous manner of single transistor realization, nondestructive reading and architectural compatibility with logic circuits. In order to achieve memory effect, it usually uses the charges trapped into the storage layer to modulate the channel conductivity of OFET nonvolatile memories. According to different operating principles and device structures, organic nonvolatile memories can be divided into three types, which including ferroelectric polymers, polymer electrets and floating gate. Compared with conventional continuous floating-gate, nano-floating-gate has the advantage of offering discrete charge trapping sites, which can effectively weaken the charge lateral flow or leakage tendency and further improve the data storage ability of the memory.The threshold voltage is a key parameter in OFET nonvolatile memory, which can be comprehended as the gate bias at which the conducting channel begins to form. The initial threshold voltage is the gate bias at which the conducting channel begins to form, as no charge trapped into the storage layer. For the p-type semiconductor, when electrons or holes are trapped into the floating-gate upon applying appropriate gate bias, positive or negative threshold voltage shift will occur. Therefore, the transfer curve with linear ordinate of device turns out to be a parallelogram, and the upper right corner inflexion of it is the transition point in transfer characteristic curve. The physical meaning of the transition point should be the starting point that electron escape from the floating gate to active layer at certain gate bias. For the n-type semiconductor, the upper left corner inflexion of parallelogram is the transition point in transfer characteristic curve. The physical meaning of the transition point should be the starting point that electron inject from the active layer to floating gate at certain gate bias. The performance of organic transistor memory can be measured by the memory window, on-off ratio of drain current, retention time and programming/erasing/reading endurance. As the performance of device especially retention time and on-off ratio would be affected by the position of transition point in transfer curve. It is of vital importance to figure out the tendency of transition point under different experimental conditions to improve the performance of the memory.In this paper, we firstly fabricated the pentacene-based organic transistor memory, where gold nanoparticles and polystyrene tunneling dielectric layer are incorporated as the nano-floating-gate, and examined the position change of transition point under different gate bias scanning speed or thickness of polystyrene layer. We found that abscissa and ordinate of transition point will respectively occur positive and negative shift when device with thinner polystyrene layer or lower gate bias scanning speed. Moreover, we did some comparative experiments and found that the device whose reading voltage is positive to the transition voltage shows better retention performance but low on-off ratio than device whose reading voltage is negative to the transition voltage. Meanwhile, we fabricated the pentacene-based organic transistor memory, where poly(2-vinylnaphthalene) as the charge storage layer, and examined the position change of transition point under different gate bias scanning speed or thickness of poly(2-vinylnaphthalene) layer. We found that abscissa and ordinate of transition point will respectively occur positive and negative shift when device with thinner poly(2-vinylnaphthalene) layer or lower gate bias scanning speed. Furthermore, we did some comparative experiments and drew the same conclusions as before. Finally, we fabricated the PTCDI-C13H27-based organic transistor memory, where gold nanoparticles and polystyrene tunneling dielectric layer are incorporated as the nano-floating-gate, and examined the position change of transition point under different gate bias scanning speed or thickness of polystyrene layer.This paper figures out the charge trapping mechanism of the memory with nano-floating-gate or polymer electrets as storage layer, and its research results can provide significant experiment information for the fabrication of high-performance OFET nonvolatile memories.