Design Of A Ka-band MMIC Power Amplifier

The convenience of modern human's life cannot be independent of the support of a variety of wireless communication systems.As a key component of wireless communication transceiver,the power amplifier(PA)have a great impact on the systems' communication distance,working time and size.With the advantages of high performance,small size and good reliability,monolithic microwave integrated circuit(MMIC)technology has become a mainstream method to implement the millimeter-wave power amplifier.Based on a 0.15 um GaAs PHEMT MMIC process,this thesis develops a Ka-band high-efficiency MMIC power amplifier for satellite communication systems' terminal application.In order to enhance efficiency,the PA is biased in AB class,and the output impedance matching network is specially optimized to suppress the second harmonic.The PA's electromagnetic(EM)simulation results show that,between 29 GHz and 31 GHz,both the input and output's voltage standing wave ratio(VSWR)of the PA are less than 1.8,and the PA has a linear gain greater than 19.2 dB,and its output power at 1dB compression point(P1dB)is more than 24 dBm,the saturated output power(Psat)is more than 25 dBm with a maximum power added efficiency(PAE)of 33.4%.At the same time,when the output power of the PA is 24 dBm,the corresponding DC power consumption is 1.018 W.According to the simulated DC power consumption,this thesis analyzes the heat generation and dissipation mechanism of the chip and establishes the thermal simulation model of the power amplifier chip.What's more,this thesis simulates the thermal characteristics of the chip by ANSYS software.The simulation results show that when the ambient temperature is 45 ?,the highest channel temperature of the transistor is 90.5 ?,just considering heat conduction dissipation,which does not exceed the limit of the maximum temperature of the process.This thesis also measures the performance of the PA chip.The test results show that in the frequency range of 29 GHz to 31 GHz,both the chip's input and output's VSWR are less than 2,and the PA the power amplifier has a small signal gain of 19.2 dB,the PA also exhibits a P1 dB of more than 24 dBm with a saturated output power of 25 dBm and a peak PAE of 35.7%.Besides,the PA chip's DC power consumption is only 0.9 W when the chip drives an output power of 24 dBm.Finally,this thesis uses HFSS and ADS simulation to design and optimize the PA chip's cavity size and its peripheral circuit.Then this thesis processes and assembles the chip module and measures the performance of the chip module.The test results show that the module's gain is 16.6 dB in the frequency range of 29 GHz to 31 GHz,and its standing wave ratio of the input port is less than 3,the standing wave ratio of output port is less than 3.6,its saturated output power reaches 25 dBm at 30 GHz.Compared with the EM simulation results,the chip's test results have reached or even better than the EM simulation results except the gain.In general,the chip designed in this thesis have achieved design purpose,and the PA can be applied to actual Ka-band communication system.