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The Algorithm Of BCH-ECC And Module Design For Solid State Storage

Posted on:2013-05-16Degree:MasterType:Thesis
Country:ChinaCandidate:R G ChenFull Text:PDF
GTID:2248330362974946Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of internet, data storage is the life of enterprise, datastorage security is very important, once the important data is destroyed, the enterprisewill bring irreparable loss. Therefore, data storage security is vital to the normal runningfor the enterprise’s final. In recent years, people on high speed digital system stabilityand reliability have become increasingly demanding, so the error correcting codes indigital signal transmission and storage is in the increasingly prominent role.BCH codes as a high performance error correcting code is a large class ofcorrecting multi-bit random errors in the error-correcting code. Its encoding anddecoding technologies have been more mature after decades of development, and have avery wide range of applications in data storage, especially in solid-state storage system,so the design of the calibration to correct the error is extremely important. In this paper,the BCH code error control field of an important class of linear block codes can notonly correct random errors but also correct burst errors, and thus is applied widely inthe field of magnetic recording systems, computer memory, wired and wirelesscommunications systems, etc.This paper sums the existing solid-state storage technology,the basic features of thesolid-state storage, internal structure, as well as the advantages anddisadvantages.What’s more,we propose a fully tap the BCH-ECC data validationmethods.The main work is as follows:First this paper introduced the basic situation of the BCH, including the definitionof the BCH, the research status and development prospects, focusing on the basicprinciples of the BCH. BCH code is divided into two parts: the encoding and decoding,but the decoding is its focus. Encoding and decoding speed directly affects the speed ofdata transfer in the solid-state storage, and therefore this paper carried out a detailedstudy of the BCH Decoding. BCH decoding is divided into syndrome computationmodule,the key equation solver module and the money search module from thehardware point of view, focusing on the decoder key equation solving module BMalgorithm has been optimized for the development of ISE10.1version tools forencoding and decoding of BCH codes, the simulation and optimization of logicresources for encoding and decoding results were compared using matlab softwareverification. Finally, the paper summarizes the related work, and make my own judgment about challenges that BCH codes and storage technology will face.This paper claims that complying with the standards of the solid-state storage is thebasic functional requirements of the BCH decoder, gives the design structure of thecodec specified parameters of the BCH code, and designs a low complexity decoder,hardware resource consumption relative less, to achieve a high clock frequency, andimprove the speed of data transmission.
Keywords/Search Tags:Solid State Disk, ECC, BCH, FPGA, NAND FLASH
PDF Full Text Request
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