Design Of A High-precision Multi-stage Time-to-Digital Conversion Circuit

Time-to-Digital Converter circuit plays a very important role in time measurement,converts the duration of the two asynchronous signals into a digital output. TDC circuit used to achieve precise time measurements within a certain dynamic range,widely applied in time of flight testing and other types of detection systems.Single mode TDC circuit quantify the basic unit of time, the common needs of high precision and wide range are difficult to taken into account.Therefore, in order to break through the measurement accuracy.TDC must rely on the system architecture just as optimize the selection of operating modes and working conditions. For the two-stage mode structure, high segment usually use the count type TDC structure to expand the detection range;Accuracy is achieved by low segement TDC structure, ensuring the accuracy of detection of quantification. Based on the structure of the delay chain TDC, further refinement can be achieved to enhance the accuracy. Therefore,high segment LFSR-TDC is applied to achieve the desired detection of a wide range; while the control voltage is obtained to improved performance TDC middle level. Further introduction of fine resolution TDC breaks through digital gating circuit delay limit, achieving high-accuracy quantized. Compared with the other three-TDC structure, the design break through gate delay limit, achieving a wide range of dynamic range expansion. In addition, this design is based on Dual-DLL architecture.with obvious advantages in terms of clock jitter or phase noise suppression ring oscillator frequency.The design of high accuracy and wide-range three-segement-TDC circuit is designed in this paper. The time detection resolution breaks the limit of gate delay.This design uses TSMC 0.35 μm standard process, verified by Cadence EDA tools.Simulation results show that:at 3.3V supply voltage, high precision can be achieved within 0.4ns, measuring range of 4μs. Due to the influence of parasitic parameters, simulation results have a difference between the results of simulation, but still meets the design specifications. MPW tests results show:under the conditions of the input clock 40MHz,15bit measurement range of TDC 4μs, while conversion accuracy may be limited to less than 0.25ns.