Design And Implementation Of Channel Estimation In FBMC Communication System

The target of next generation cellular mobile communication system is aimed at ubiquitous mobile multimedia transmission of high quality and high speed that supports full-service and coverage everywhere. Filter bank multi-carrier(FBMC) employs a prototype filter that is longer than the symbol period(such as a raised cosine filter) as a pulse shaping filter. This reduces the spectral side lobes so that it can reduce the mutual influence of the sub-carriers. FBMC is considered as an alternative to orthogonal frequency division multiplexing(OFDM) technique.Mobile communications is facing more complex environment that multipath and doppler effect have impact on the quality of communication. FBMC improves the frequency spectrum utilization by removing cyclic prefix(CP) in OFDM. But subcarriers orthogonality is limited to the real field only(not the complex field).So it is difficult to perform channel estimation in FBMC system.In this paper, we design a new frame structure and propose an effective channel estimation method in FBMC based on frequency spreading(FS) using block pilot in four columns at the beginning. This structure can effectively eliminate imaginary interference and noise jamming by calculate the maximum imaginary interference of the pilot. With the rapid development of field programmable gate array(FPGA), we can perform complex parallel computations in communication systems. The paper implements channel estimation by Verilog Hardware Description Language using IP core such as first input first output(FIFO) and get the right results with a lower use of hardware resources. We can get more accurate channel information and eliminate the interference to ensure the performance of the entire FBMC system.