Research And Design Of Carrier Synchronization Algorithm Of UFMC System

As one of the 5G candidate waveforms,the universal filtering multi-carrier has attracted widespread attention due to its excellent out-of-band suppression and high spectrum utilization.UFMC is also one kind of multi-carrier technique and carrier frequency offset is one of important factors to affect its system performance.In this thesis,the frequency offset of the signal is estimated at the receiver to achieve carrier synchronization in order to reduce the effects of carrier frequency offset on system performance.Therefore,this thesis mainly centers on researching the carrier frequency offset estimation algorithm of UFMC system.Based on the background above,this thesis firstly analyses the basic principles of UFMC system and provide the relationship between UFMC and OFDM in the form of formula derivation.Meanwhile,it concludes the characteristics of UFMC system by combining with subband filter process.It provides possible improvement direction on the basic of comprehensively analyzing existing carrier synchronization algorithm.Besides,after analyzing the causes of carrier frequency offset and the effect on the performance of UFMC,this thesis applies S&C algorithm to UFMC.Due to the special symbol structure of UFMC after filtering,corresponding changes must be made in the realization method of decimal and integer doubling frequency offset estimation.An improved algorithm only using one UFMC symbol is proposed to be training sequence to reduce the cost of the synchronization sequence in this thesis by using thoughts of traditional algorithm for lessons.Frequency offset estimation process is jointly completed via integer frequency offset estimation and fractional frequency offset estimation.Among them,the integer frequency offset estimation is calculated using the principle of spectral correlation;in order to improve the estimation accuracy,the structure of the training sequence is redesigned for fractional frequency offset estimation after integer frequency offset compensation.The simulation data shows that the improved algorithm not only has a large estimation range but also has high estimation accuracy.Finally,the hardware realization schemes of carrier frequency offset estimation modules and other key modules in receivers are provided based on FPGA.Among them,the carrier synchronization module is realized on the basis of the improved algorithm.Based on theory analysis,algorithm implementation structure should be firstly determined,divided into several sub modules and parameters of data width etc in hardware language should be determined via Matlab simulation data in the course of realization.Eventually,various sub modules are realized by using hardware description language.Modelsim simulation is conducted for modules to compare whether the simulation results are consistent with the simulation results of Matlab in order to verify whether its logic is correct.Finally,the generated bit file is downloaded to the development board,and Chipscope is used to capture the real-time signal on the FPGA to complete the debugging and verification of the entire system.