B3G Design And Implementation Of Key Technologies - Channel Estimation

During the past twenty years, in the whole world, mobile communication has been developed rapidly and undergone three generations—the first generation based on analog communication, the second generation based on digital communication, and the upcoming third generation based on multimedia communication. Nowadays there has been great development in the mobile communication all over the world. The government attaches importance to it and has started the" FuTURE project" named B3G-beyond 3rd generation mobile communication system (B3G). B3G is at along the 3th on behalf move the foundation top of the communication, evolving the direction develop to 4G ambulation communication technique. UESTC is in charge of the TDD downlink that bases on FPGA. The textual and main contents is to introduces a channel estimation of technique with introduce the method that realizes with the FPGA.In chapter 1, the development and situation of OFDM and MIMO technologies are introduced, and the reason to use channel estimation and its development are also discussed.In chapter 2, FPGA (Field Programmable Gate Array) is a kind of programmable logic device. By the programmable cable, we can download our design to the FPGA chip. Shorter designing time, less investment and no risk are the advantages and it can be modified, programmed and downloaded repeatedly.In chapter 3, introduced every kind of letters a method for channel estimation. A channel estimation method for MIMO-OFDM system by using correlation of pilot sequences has been proposed. The key point of this algorithm is the auto-correlation of the sequences. This paper presents a method for optimum training sequences design and the channel estimation that follows. By using these training sequences, we can obtain the channel state information (CSI) sufficiently, and in the mean time, the Gaussian noise and inter-carrier interference can be restrained effectively.In chapter 4, a design for introducing this thesis point under the B3G TDD method a network receives to carry the—use a FPGA for channel estimation realizes. The FPGA adoption Xilinx company Virtex-ⅡPro series product--XC2VP70 of this design, design the ISE series software of the terrace adoption Xilinx company. Introduced primarily the P2S, frequency estimate, the first floor mold piece that time estimate with upper level mold piece.In chapter 5, take out the different letter way estimate the function the comparison.In last part, tallying up textual work, giving concluding theory, and putting forward in this text exsitting and should proceed work.