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Design Of Low Power Asynchronous 80C51 Microprocessor

Posted on:2017-01-10Degree:MasterType:Thesis
Country:ChinaCandidate:J C XiFull Text:PDF
GTID:2348330491464035Subject:Microelectronics and Solid State Electronics
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The most effective way to reduce power of a microprocessor is to scale supply voltage. However, when supply voltage is scaled, Process variation has more impact on the delay of combinational logic with the scaling of voltage. In order to avoid timing error, when using traditional synchronous approach, a safe margin is required. As a result, the decrease of performance is the bottleneck of low voltage synchronous circuit design. On the other hand, asynchronous approach do not require a safe margin using handshake protocol, which leads to large area overahead. However, asynchronous circuits accommodate process variation well and is suitable for low voltage microprocessor design.In this thesis, a low power asynchronous 80C51 microprocessor was implemented base on NCL logic and dual rail data encoding. First a theoretical model was build based on the structure of asynchronous circuit. The advantage of asynchronous circuit in terms of power and performance was proved by the model. After the comparison between different asynchronous model, the technology roadmap of NCL logic and duail-rail data encoding was determined. A new scaled 3 stage pipeline was used in order to reduce power and local process variation. The instructure of the register file was improved by merging registers with same function for lower power dissipation. Using branch design method, useless feedback circuit was removed to reduce the power of register. Wavefront steering technique was used on the ALU which lead to lower power dissipation as well. A NCL cell library was designed and optimized for low power based on static logic. Finally the asynchronous 80CS1 microprocessor was synthesized using automatic design flow based on UNCLE.The verification platform was build first. The power and the performance of asynchronous 80C51 was measured and compared to a synchronous 80C51. Results shows that the energy delay product of the asynchronous 80C51 is 14.2% lower than its synchronous counterpart when supply voltage is set to 0.6V. Further research was done to find out how the power and the performance varies when supply voltage was scaled. Results shows that asynchronous 80C51 has more advantage then its synchronous counterpart in terms of power and performance.
Keywords/Search Tags:NCL asynchronous circuit, 80C51 microprocessor, low power, low voltage
PDF Full Text Request
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