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Design Of Data Acquisition Control System Based On FPGA

Posted on:2016-01-14Degree:MasterType:Thesis
Country:ChinaCandidate:B Z LiFull Text:PDF
GTID:2348330488974423Subject:Engineering
Abstract/Summary:PDF Full Text Request
Data acquisition system is an important part of signal and information processing system. With the improvement of the accuracy and speed of data, the requirements for the data storage, data read and write are also increasing. Therefore, the system uses ? SDRAM DDR as the storage device, the Ethernet and UART as the communication control interface, and the optical fiber is used as the control interface for other devices.The whole program is composed of three parts, including the hardware circuit, the internal logic of FPGA chip and the Nios-ii program. The hardware part includes signal collection front end, FPGA control system, SDRAM storage circuit, power management, communication control interface, etc. The core component uses the FPGA chip of the Altera corporation, the storage device uses DDR ? SDRAM, and the ADC conversion chip uses a 12-bit ADC as the core. The principle diagram of the modules are designed according to the technical index requirements. In the FPGA digital logic design part, the Qsys system development tools provides a rich IP core resources, and the custom peripheral functions provides convenience for the read and write of DDR ? SDRAM, UART and Ethernet communication. At the same time, the Nios ? processor makes it more convenient and more flexible and convenient for the host computer to control the whole system.The final design is 12-bit sampling accuracy, 512M-deep storage control panel with a variety of transmission control interface.
Keywords/Search Tags:Data acquisition, FPGA, DDR? SDRAM, Qsys, Nios?
PDF Full Text Request
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