Simulation Research On The Process And New Structure Of The Tunneling Field Effect Transistor

As the feature size of the MOSFET device come into nanometer scale, the short channel effect has serious impact on the performance of the traditional MOSFET device, and methods of downsizing to increase device performance become more and more difficult. In recent years, the TFET(tunneling field-effect transistor) based on quantum tunneling is proposed. In theory, TFET not only can effectively inhibit the short channel effect, but also can break the 60 m V/dec limitation in subthreshold swing of traditional MOSFET, and can reduce the switching power of the device significantly. Therefore, TFET is considered to be one of the most promising ultra low power devices.The subthreshold current of TFET is very sensitive to the defect of the tunneling junction. So the defects caused by ion implantation have a serious impact on the TFET device. In order to reduce the influence of the defect on the TFET subthreshold characteristics, this paper mainly studies two aspects of process optimization and device structure design.First, the influence of process parameters on the characteristics of TFET device is analyzed by TCAD tool. The research shows that with the doping dose in source region increase, the central density increases and the tunneling current increases. In contrast to the lateral diffusion length, the increase of the longitudinal doping depth has little effect on the tunneling effect. In addition, it is found that the saturation current increases with the increase of temperature, which indicates that the increase of the annealing temperature can be helpful to the activation of the doping element in the constant annealing time.Secondly, the repair ability of different annealing techniques on the boron-interstitial clusters defects is analyzed, and the variation of the concentration curve and the resistivity of the film is also analyzed. The results show that using the new annealing method, the resistivity of the film is obviously decreased, and the boron-interstitial clusters defects is obviously repaired.Finally, the effect of the spacer-channel-covered structure on the performance of TFET is studied. The results show that the leakage area of the side wall can decrease the on state current and increase the off current, but do not effect the gate leakage current. In additon,the trational TFET structure is optimized, and structure of the TFET device with the gate-source-covered and source pocket is designed, and the TCAD simulation is also carried out. The results show that with the length of the covering length increases, capacity of gate control enhances, and the gate covering structure cause significant bending of energy band within the coverage area, point tunneling turn into line tunneling, while the subthreshold swing also increased. After adding a source pocket doping, the entire transistor tunneling current increase, and the subthreshold swing also decreased.