The Research Of Dual-Mode LDPC Decoder Based On DDE

The findings of LDPC and Turbo are major breakthrough in the research of channel decoding,which indicates that the theoretical research and technology of error correcting code has stepped into a new era.In low SNR conditions,the performance of Turbo codes is better than other codes.However,due to the low density characteristics of LDPC codes,and in the case of the code length is long enough,its performance is better than Turbo codes.In the actual hardware environment,the LDPC/Turbo dual-mode decoder can make full use of the advantages of these two codes,but there are still some problems such as high hardware loss and low throughput.The purpose of this paper is to guide the hardware implementation of the dual-mode decoder by using the discrete density evolution theory.This paper optimized LDPC/Turbo dual-mode decoder from the hardware structure and theoretical analysis.The dual-mode decoder can support the Wimax standard and TD-LTE standard,and can be arbitrarily switched LDPC mode and Turbo mode.The first part: hardware structure.To meet the higher data rate requirement of encoder,an encoder structure suitable for both two rates(1/2,2/3B)in WIMAX standard is proposed.In order to reduce the hardware consumption as the main idea,we deeply study the similarity between TDMP algorithm and Log_MAP algorithm,and give the theoretical derivation and the structure of dual-mode hardware.In the actual design of the decoder,SISO modules are formed the SISO array to improve the throughput.The simulation results show that the dual-mode decoder consuming a total of 59,240 logic cells,the maximum operating frequency is 71.81 MHz.In LDPC mode the throughput is 137 Mbps,in Turbo mode the throughput is 43 Mbps.Compared with the dual mode decoder in other literatures,the decoder still has a high throughput rate in the case of low integrated clock frequency.The second part: theoretical analysis.The main work is to introduce the DDE theory on the basis of the simplified design of the dual mode decoder,and to guide the implementation of the LDPC/Turbo dual mode decoder.Firstly,we analyze the number of iterations based on the DDE theory,and calculate the number of iterations based on the multi criteria decision.Secondly,because of the current DDE theory,there is no analysis of the TDMP algorithm.In this paper,the DDE theory is used to deduce the TDMP algorithm and verify the superior performance of the TDMP algorithm.Simulation results show that,in the same case,the TDMP algorithm converges faster.In the best case,the number of iterations of the TDMP algorithm is half of the number of iterations of the BP algorithm.This means that it is feasible to select the TDMP algorithm as the dual mode decoding algorithm.Based on the above results,we use MATLAB software to simulate and analyze the performance of DDE theory.We use Verilog to program,and in the FPGA platform to complete the design of LDPC/Turbo dual-mode decoder.We use Modelsim software to get the output waveform of the dual mode encoder and decoder.This paper presents a number of improvements on the theory and hardware implementation,which lays the foundation for the further research of the dual-mode decoder.