Multi-mode LDPC Decoder Design And Prototype Verification

In the field of wireless communications, various wireless communication protocols are proposed recently. With growing of the processing demand, the computational complexity is also growing. From the viewpoint of the time and cost, putting various protocols together directly is not feasible, so focusing on multi-mode terminal is the future of wireless technology development.Based on the needs of multi-mode communications, the thesis proposes a circuit structure of multi-mode LDPC decoder which can meet the demand of both Wi-Fi 802.11n/ac protocol and DVB-T2 protocol without modifying configuration. Meanwhile, in order to verify the decoder, VivadoTM HLS platform for high-level synthesis design is used. The tasks of the thesis are concluded as follows:(1) Based on Matlab language, the simulation environment of Wi-Fi 802.11n/ac protocol and DVB-T2 protocol is set up.(2) Differences and similarities of the LDPC codes within two types of protocol is studied, an efficient structure for multi-mode LDPC decoder is proposed, which is compatible with two types of protocol, so that the update conflict problem in DVB-T2 protocol can be avoided. At last, the performance of two protocol in two matlab simulation chains are simulated and verified.(3) Based on VivadoTM HLS platform, design flow and test bench of multi-mode LDPC decoder circuit is built, the function of sub-modules and multi-mode LDPC decoder is designed by VivadoTM HLS and verified by C/RTL co-simulation, the sub-modules is simulated and analyzed dynamically in HDL level.At the end of the design, in order to confirm the correctness of function, based on the VivadoTM HLS platform, the test bench is written with C language, and provides the test stimulus to C/RTL co-simulation. The multi-mode LDPC decoder is simulated with C/RTL co-simulation flow, and the simulation result of RTL design is compared with that of C code design. In the case that FPGA device is xc7k70tfbg484-1, the clock frequency is set to 100 MHz, the multi-mode LDPC decoder works correctly and the throughput is 6.79 Mbps.