Design Of Real-time Signal Processing System Of Ranging Lidar With High Precision

With the generation of laser radar, the precision of the radar signal has been improved by several orders of magnitude compared to microwave radar. Therefore more stringent technical requirements need to meet when designing the radar signal processing system, especially for the demand of real-time.The thesis analyzes and compares the design programs of several existing radar signal processing systems, and chooses the framework with FPGA and DSP as the reference solution. With the help of high-performance chips, the processing performance of the program is enhanced, which makes the processing system meet the demands. This thesis includes the following aspects:Firstly, the thesis describes the procedure of how to select main chips of the signal processor, and outlines the characteristics of each chips, which provides a hardware foundation for the follow-up designs. It analyzes the system power and clock needs, records the design procedure of power and clock with great details. Meanwhile, this thesis describes the main process of the PCB design, and the key points of PCB design.Secondly, the thesis introduces the main interfaces that used for the control and transmission in signal processor. Starting from the protocols of the interfaces, specificly introduces the principles and design procedure of each interfaces.In order to verify the correctness of the design, we carry out the transfer tests on each interfaces, analyze the test result, and compare the experimental result with the theoretical ones. Then discuss the main reason of the differences between the aboving two results.Thirdly, the thesis describes the workflow of the various functional modules in the system. System includes the contents of the chip configuration and data thansfer interfaces. According to the practical requirements, we firstly design the overall workflow solution system, and the multi-core DSP tasks between the cores. Thereafter, we use the signal produced by the DDS, according to the microwave phase ranging mode, to conduct fountional tests to the entire signal processor,then obtain the test data with satisfying results.Last but not least, the designing processes of configuration and bootloader are introduced. The paper describes the hardware and the configuration process of master-serial configuration mode of FPGA. The paper describes in detail SPI boot mode of DSP, including the hardware design, the principium and the processing detail of SPI boot mode. In addition, whether the system works has been verified, and the board has been able to achieve bootstrap.Finally, a brief summary of the thesis is given, and design deficiencies are proposed.