Design And Implementation Of Digital Baseband For Passive UHF RFID Tags

Internet of Things as an emerging industry in recent years, its booming promotes the development of radio frequency identification(RFID) technology, the RFID technology is applied to a wider range. In order to realize the intelligent control of things, everything in control can have a RFID tag, which keeps information of thing. RFID automatic identification technology as a means of communication, readers can get the information from the tags and provide the collected information to the background management system, so that the intelligent management of object are coming to true. As a main block of tag, digital baseband not only decides the functions of the tag, but also affects the performances of the tag. In this paper, a digital baseband applying to the passive UHF RFID tags is design, which is fully compatible with National Protocols, Information technology – Radio frequency identification – Air interface protocol at 800/900 MHz(GJB 29768-2013).This paper introduces the development trend of the RFID tags and then mainly presents the related problems during the period of the developments, analyzing the design status of tags in domestic and foreign, safety problems, low-power problem and communication protocols problem.Having a good comprehensive on the working environment and the condition of the digital baseband, it introduces the structure of RFID system in detail. In the framework of communication protocol supported by digital baseband, the reader how to establish the communication and interact with the tag chips are concretely shown.On the basis of the National Protocols, this paper puts forward the performance and functional demands on the design of the digital baseband, realizes it using the way of modularization design, and verifies it through FPGA prototype verification. The baseband with a total of ten modules, its different module is responsible for the related work, through the coordination and mutual assistance the baseband complete the signal receiving, processing and sending work.Logic synthesis of baseband is going on with related analysis and verification of synthesis is presented. After verifying of the netlist, the physical design of baseband can start, the methods and steps are analyzed, and the new netlist is verified. Finally, we can make sure the layout of tag chip.In the process of designing the baseband, this paper pursue the low-power design through three ways, which are system-level, structure-level and register transfer level(RTL). The ways such as modular design, multiple clock domain design and assembly line design can reduce the power consumption of the baseband by lowering the operating frequency and the activity of the circuit.The baseband design with TSMC 0.18 ?m process, has an area of 42347 ?m2, about 4980 GEs and an overall dynamic power consumption of 1.79 ?W after synthesis, while has an area of 58320 ?m2, and an overall dynamic power consumption of 2.23 ?W after the physical design. The baseband is applying to the national protocol, the function of which is correct, and the power is lower.