Nowadays, general radio frequency chips are developing much fast. Wideband wireless radio frequency transceivers are becoming hot topics in both academy and industry. As a key module in transceivers, wideband fractional-N frequency synthesizer is more and more popular.This thesis focuses on industry applications. Two ultra-wide-band fractional-N frequency synthesizers (whose frequency band are 1.25?2.35GHz and 0.1?1.2GHz), one narrow fractional-N frequency synthesizer (whose frequency range is 2.45?2.75GHz) and one fixed frequency phase-locked loop (whose frequency is 220MHz) are designed. The system scheme of ultra-wide-band frequency synthesizer is designed according to system requirements. Phase noise theory and design method of low phase noise voltage-controlled-oscillator (VCO) are studied. The calculation method of closed-loop phase noise of PLL by every individual module's noise is proposed. One design flow of complementary differential VCOs is given. Frequency pulling between on-chip oscillators is studied and the suppression method of frequency pulling is proposed. All modules of the frequency synthesizers are designed based on Chartered 0.18um CMOS RF process, including phase/frequency detector (PFD), charge pump with virtual branch, loop filter, voltage-biased VCO, programmable frequency divider, buffers, low voltage regulator, automatic frequency control circuit, ?-? modulator.This project has validated by three MPWs. The experimental results reveal that the frequency bands of 1.25?2.35GHz,2.45?2.75GHz and 220MHz are covered. The typical closed-loop phase noises are-123.76dBc/Hz@1MHz and-142.65dBc/Hz@10MHz. |