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Interface Properties And Threshold-Voltage Model Of High-k Gate-Stacked Dielectric Ge MOS Devices

Posted on:2021-01-17Degree:MasterType:Thesis
Country:ChinaCandidate:L ZhouFull Text:PDF
GTID:2518306107960349Subject:Microelectronics and Solid State Electronics
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With the rapid expansion of electronic technology,the performance of MOS devices requires continuous improvement.Howerver,the miniaturization of Si-based MOSFETs becomes increasingly difficult,which has gradually approached its physical limits.Germanium(Ge)has higher hole and electron mobilities than those of Si,especially hole mobility,making it greatly significant for research.The poor interface quality between the high-k gate dielectric and Ge surface has hampered the application of Ge MOSFET in integrated circuits because of unstable and water-soluble Ge sub-oxides.In this paper,the interface properties and electrical characteristics of stacked gate HfGdON/LaTaON/Ge MOS devices with La-based oxynitride as the interface layer and Gd doping Hf-based oxynitride as the high-k layer are investigated.The passivation effect of NH3 plasma treatment on the gate dielectric and the improvement of device performance are compared.On the other hand,the threshold voltage model of the stacked gate dielectric Ge pMOSFET considering the influence of interface traps is established and compared with the experimental results.In experiments,the effect of different content Gd doped HfON as high-k gate dielectric on the interface properties and electrical characteristics of Ge MOS is investigated.The results show that the appropriate content of Gd(eg:?13.16%)in the HfON film can effectively suppress the formation of germanate HfGeOx and suboxide GeOx near/at the Ge interface and reduce the oxygen vacancies in gate dielectric film.At the same time,the doping of Gd into the HfON film will increase the conduction band offset(?Ec)of the gate dielectric.Therefore,the MOS device has a smaller gate leakage current density(2.29×10-6A/cm2@Vg=Vfb+1 V)and a lower interface state density(6.93×1011cm-2e V-1).Based on the above experiment,the different surfaces of HfGdON/LaTaON/Ge stacked gate dielectric are treated by NH3 plasma.The passivation effect on stacked gate dielectric film and Ge surfaces is investigated.The experimental results show that NH3plasma treatment on the Ge surface directly can promote the formation of GeOxNy,which substitutes for the native oxides.In addition,more N incorporation can effectively suppress the formation of oxygen vacancies in stacked gate dielectric and reduce the generation of unstable suboxide GeOx near/at the Ge interface.The H atoms and NH radicals separated from the NH3 plasma can passivate the dangling bonds near/at the Ge surface.The fabricated Ge MOS capacitor exhibits excellent electrical and interface characteristics,such as a higher k value(22.3)and a lower interface state density(3.84×1011cm-2e V-1).In theory,the analytic model of the threshold voltage considering the influence of trap charges between the interface passivation layer with Ge surface and the high-k gate dielectric layer is presented,and the surface potential is determined by analyzing the two-dimensional Poisson equation.Comparing the theoretical value of the model with experimental measurement data,which show quite consistency.The investigation results present that the interface charges can decrease the amount of threshold voltage shift.In addition,the interface passivation layer with a higher dielectric constant and a thinner physical thickness can reduce the effect of the interface trap charges on the threshold voltage of the devices.In order to suppress the short channel effect,appropriate doping concentration for devices with different channel lengths is important.For example,for L=50-60 nm,Nb=5×1017cm-3 is more appropriate.
Keywords/Search Tags:Ge MOS devices, Stack gate dielectric, Interface properties, Plasma treatment, Threshold voltage
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