Threshold Voltage Model Of Small MOSFET And Preparation Of High-k Gate Dielectric

The feature dimension of MOSFET is significantly scaled down because of the continuous increasing of IC integration density. As a result, some device structural parameters approach to their physical limits gradually. The further scaling of MOSFET faces a series of challenges and difficulties, especially in modeling and simulation of device characteristics, choice and preparation of gate dielectric and its interface properties with substrate.This thesis concentrates on impacts of quantum effect on electrical characteristics of MOSFET. The quantization of channel charges is analyzed by means of triangle-well approximation numerical solution of the Schr?dinger's and Poisson's equations. Then a threshold condition different from the classical one is proposed for MOSFET with quantum effects, and thus an accurate 1-D threshold-voltage model is obtained, with good agreements between simulated results and measurement data. Based on this 1-D model, an accurate 2-D quantum-modified threshold-voltage model for small-scaled MOSFET is developed by solving the quasi-2D Poisson's equation and taking short-channel effects and quantum effect into consideration. The model can also be used for simulation of electrical properties and design of structural parameters for very deep-submicron MOSFET with high-k materials as gate dielectric.A new-type processing of high-k dielectric gate MOSFET device is studied. The effects of various pre-deposition surface treatments such as NO-annealed, N₂O-annealed and O₂+trichloroethylene (TCE) on the interfaces properties are investigated. The results of all above methods are compared and the compact of pre-annealing on the densities of interface and gate leakage currents and oxide thickness are studied.