A Clamp Circuit ESD Protection Research And Realization

About 37% IC (Integrated Circuit) chip failure associated with ESD/EOS (Electro-StaticDischarge/Electricity Over Stress) in industry survey, with the integration of circuits increase, reducing gate oxide thickness and the high working frequency, the development of electronic technology, more and more application of electrostatic sensitive components. Therefore, in order to obtain better performance, higher reliability of the IC chip, the special research on ESD and find it is necessary to solve the method. As IC technology continues to scale, ESD has also become more prominent, ESD has become a high integrated IC chip need attention and is one of the important problems to be solved.As the company is certainly cost minimum and the profit maximization is considered as the first. So the design of ESD is a simple GGNMOS, and did not consider the use of circuit level or double level protection. Because the circuit level or double level protection consumption area will increase the cost, so the ESD is difficult to be solved effectively. With the changes in the market, ESD problem is a problem that must be solved, but not increase cost. So I choose this product ESD as the research object. The difficulty is how to effectively improve the product ability of ESD and no increase of cost.In this thesis, ESD protection device as the research object, starting from the basic model of the electrostatic, understanding of the definition and standard of various model. The human body model is most commonly used in industrial (HBM-Human Body Model) as the main measurement capabilities of ESD standard. This paper improves the ESD protection scheme clamp circuit in actual products, the GGNMOS (Gate Gnd NMOS) protection scheme that is from GRNMOS (Gate Resistance NMOS) to the protection scheme, through the analysis of the characteristics and working principle of clamp clamp circuit control circuit before the open, to electrostatic discharge current, found the clamp pipe to reduce the trigger voltage ESD protection devices can be protective clamp circuit, through the experiment to find the right trigger voltage Vtr. The final product from the original HBM test less than 500V, by using the GRNMOS protection scheme for the ESD capacity to 4000V.The experimental results show that:the TLP test and HBM test (4KV) to achieve the objectives and requirements, and in terms of cost and no additional cost.