Research And Impementation On Detection Algorithms In LTE Downlink

Orthogonal Frequency Division Multiple Access (OFDMA) is combined with Multiple-Input Multiple-Output (MIMO) technology for LTE downlink transmission, which can be effectively against frequency-selective fading and significantly improve the system throughput. As a result, LTE system has been on the way of commerce applications. In this thesis, iterative detection and receiver algorithms in LTE system are investigated as well as its hardware implementation.Firstly, MMSE-SQRD based detector independent from decoder is investigated. To reduce the computation complexity of the detection, eliminate interference between layers and the propagation of errors to a minimum, the MMSE-SQRD detection algorithm is derived based on the classic MMSE detection.The simulation results show that, MMSE-SQRD algorithm can significantly improve the system performance. Meaningwhile, for better implementation, three different simplification algorithms of soft demodulation are proposed after introducing the log-map algorithm. Simulation results also show that system performance stay almost unchanged although the improved algorithms have lower computation complexity.By the way, the soft modulation and QR decomposition algorithm are also introduced.Secondly, SISO detection algorithm used in iterative receiver of LTE downlink transmission is investigated. After the review of the traditional MMSE-SIC algorithm, the MMSE-OSIC detection algorithm is derived. In order to reduce the computational complexity and improve system performance, a modified algorithm MMSE-SQRD algorithm is proposed with the introduction of extended channel matrix. The simulation results show that, compared to MMSE-SIC algorithm, MMSE-SQRD based iterative detection can get higher performance at the cost of lower computation complexity.Finally, the design and implementation of the MMSE-SQRD detection algorithm on the FPGA platform is given. System is clarified into several modules according to specific functions. The statistical analysis is perfomed to quantilize the signals of each module, and the performance of fixed-point implementation is comfirmed through simulation results.Then, hardware design of each module is proposed. In some scenarios, a large number of test cases are analyzed and tested to verify the correctness of the system.