Design Of Signal Detector Used In RapidIO Receiver

RapidIO is one of the best choices to realize the interconnection between processors. Since RapidIO technology has been widely used in wireless base station, high performance cloud computing, imaging, video monitoring, video and audio facilities, military, industrial control, test and measurement and other fields, RapidIO transceiver chip has gradually become a research hotspot in China. Thus, the signal detector has an important application value to research and design as a vital module in the receiver.Based on SMIC 0.13μm CMOS technology a signal detection circuit applied in RapidIO receiver is designed in this paper. The supply voltage is 1.2V, and the input signal rates are 1.25Gbps,2.5Gbps and 3.125Gbps. The signal detector comprises peak comparator, clock generator, clock processor, buffer and bias circuit modules. The clock generator generates a clock signal, the clock processor produces control signals and enable signals after frequency-halving processing and two-phase non overlap processing. The peak comparator begins to work under the control of control signals. When the enable signals is effective, the compared results will export after shaping. The buffer can filter out glitches and spikes, improving the anti-interference ability of the circuit. This paper gives circuit design of the signal detector, including schematic design, pre-simulation, layout design and post-simulation. Layout area of the designed signal detector is 30×150μm2. The results of post-simulation show that, in the simulation environment of typical process corner and 25℃, While under the input signal with three different rates, the three input signals with different rate, its detection errors are less than 7.5mV, and its working current is lower than 0.9mA, which can meet the requirement of design index.The designed signal detector can be used in RapidIO transceiver system and monitor the receiver input signal in real time. At the same time it can also be applied in other types of interface circuit after appropriate adjustments.