Research On Soft Demodulation Technology Of TD-LTE Digital Relay System

4G licenses have been issued in succession currently. A strict requirement has been put forward for the LTE system transmission performance by the developing new types of business. Relay techniques have been applied into 3GPP LTE version 10(R10 protocol), as they can increase the capacity of the network and resist packet loss effectively by forwarding and retransmitting data packets. The decoding performance is an important index on measuring the communication quality of the relay system in relay technology. To improve the decoding performance can effectively reduce the bit error rate in the process of information transmission, and improve the reliability of information transmission. The decoding performance improvement of TD-LTE digital relay system is set as a target in this thesis and the soft demodulation technology is studied according to the characteristics of the relay system. The research is carried out in three aspects, which are soft decision algorithm, simulation and FPGA design and simulation.Firstly, the design principle and demodulation principle of TD-LTE digital relay system are introduced. Considering the main characteristics of the digital relay system and the requirements of agreement R10, a decision algorithm applying to the soft decision technology is proposed, which can get the LLR values of every bit though simplifying the calculation of the bit logarithmic likelihood ratio in the received signal. The data information before modulation is got by sentencing the LLR values of every bit. This algorithm can be implemented in hardware for its calculation process is easy.Then, the LLR algorithm is applied to 16 QAM demodulation process, meanwhile the LLR values of every bit in 16 QAM are deduced and the coordinate graphs of the every bit LLR value are obtained. In the channel conditions of a separate channel of Rayleigh fading,hard demodulation(decision) and soft decision method in which the LLR algorithm is applied are simulated respectively in QPSK, 16 QAM and 64 QAM.Simulation results show that comparing with the hard demodulation, the bit error rate of relay system is reduced effectively when the soft decision algorithm is applied to the relay system, and the bit error rate of the system is reduced to 10-3 while the signal noise ratio is about 18 dB. So it can meet the performance requirements of LTE digital relay system.Finally, the FPGA design and simulation verification of demodulation modules in QPSK, 16 QAM and 64 QAM in the LTE digital relay system are finished. The LLR algorithms in the above three demodulation modules are implemented by using the Verilog HDL language, and the function simulation and timing simulation are made on Quartus II9.1 respectively. Simulation results show that the designed demodulation module meets therequirements of digital delay system in function and verify the feasibility to choose LLR algorithm to design a demodulation module on FPGA platform.