Design Of Based On The FPGA Digital Phase-Shift Full Bridge Soft Switching Communication Power

Communication power as a communication system is an important part of its intelligence systems and precision voltage output stability of the communication system, a communication error rate and maintenance costs of information plays a big role. Communication power of digitization is the key to solve the communication power system intelligent, communications power digital enables network management multi-zone, large communication power, so as to achieve the purpose of remote centralized monitoring, thus greatly reducing the communication power maintenance costs and manpower cost. Further communication power of digital communications to have a good solution to back-up power supply technology, technical difficulties and machines are streaming technology.The main power supply circuit design of digital communication using phaseshifted full-bridge ZVS soft switching topology, given the main loop circuit modules, such as EMI circuit design, anti-surge circuit, a full-bridge switching circuit, the output of the filter circuit and device parameters calculations. Softswitching technology can effectively solve switching power supply size, weight,high-frequency loss and electromagnetic interference. This paper introduces several common topology switching power supply design, and then phase-shifted full-bridge ZVS converter a detailed explanation and analysis, and phase-shifted full-bridge ZVS converter duty cycle loss and lagging arm difficult to achieve ZVS issues were discussed and decided to give the program a specific solution.The digital communication digital power controller is based on FPGA design, FPGA chip is selected Altera Corporation produced EP2C8Q208C8 N chips. Digital controller includes an output current and voltage sampling circuit,ADC conversion circuit, serial communication circuit, relay and buzzer circuit,LCD display circuit, DPWM output module. Wherein the ADC circuit sampling circuit analog signal is digitized and transmitted to FPGA, FPGA internal PID algorithm module to calculate the phase shift value, DPWM output module output by four PWM signal, in order to achieve a stable output voltage control purposes. Because the traditional PID algorithm will be greatly overshoot the instant the power is switched on or overloaded, we design an incremental integral separated PID algorithm, using MATLAB software SISO Design Tool platform of these two algorithms were simulated and contrast the results show that integral separation PID algorithm has a good overshoot suppression effect. Finally, make FPGA-based digital phase-shifted full-bridge soft switching communication power prototype, prototype and experimental verification, test requirements to achieve the desired results.