Research On Key Technologies Of Silicon Based Millimeter Wave Frequency Synthesizer

With rapid development of Internet technology and intelligent terminals, there are increasingly demands for high speed wireless data transmission and millimeter wave communication become research hotspot, recently.Frequency source for millimeter wave communication transceiver system provides the local oscillator, in which phase noise, tuning range, frequency stability and power is very important for the transceiver signal quality. In this thesis, based on the background of millimeter wave wireless communication standard Q-LINKPAN, the 45GHz millimeter wave phase locked loop chip is designed by using 90nm CMOS technology. The main contents of this thesis are as follows:In this thesis, the structure of the integer phase locked loop is introduced, and the calculation method of the loop filter is analyzed.Then the phase noise model of the voltage controlled oscillator is analyzed, and several methods to improve the phase noise are obtained. VCO bias current source inductance-capacitance cross coupled structure is adopted, in order to reduce the parasitic capacitance in the resonant cavity, the cross coupling pipe adopts centroid symmetrical layout and the transformer is used to isolate cavity resonator and buffer circuit. In order to improve the consistency of the simulation results and test results, the inductor and transformer in the process database are re designed, and then the whole layout of the voltage controlled oscillator is simulated by HFSS. After testing, the output tuning range of the voltage controlled oscillator is:42.4-49.8 GHz. Phase noise at the frequency of 46 GHz is:-99.7dBc/Hz@1MHz offset. The test results and simulation results are in good agreement.Based on the edge triggered D flip-flop and logic gate structure, the phase frequency detector can eliminate the dead zone of the phase detector by adding proper delay unit in the reset signal. Charge pump circuit structure uses high gain error amplifier with two branches of the drain electrode voltage clamp at the same potential, so as to ensure that the two branch current are exactly same. Charge and discharge currents are equal, in the simulation of the circuit function. The phase noise model of the phase detector and charge pump is analyzed, helps to optimize the noise of the phase detector and the charge pump.At the end of the thesis, the layout of pll is discussed. The loop filter parameters are calculated by matlab. PLL closed-loop and open-loop amplitude frequency and phase frequency characteristics are verified by using matlab simulation, the phase noise of each module is analyzed and equivalent to the noise at output port by using the continuous noise model.