Design Of A High Precision And Low Noise Operational Amplifier

Operational amplifier is one of the most critical building blocks, especially in analog IC. For example, amplifier is the core of high-level systems such as data converters, filters, sensors and so on. The performance of amplifiers decides the performance of the entire system and it may become the limitation to further upgrade the systems. Since the advent of the first commercial integrated operational amplifier developed by Widlar in the 60 s of last century, large amounts of advances have been done for amplifiers. The technology has developed to nanometer. The progress of technology brings chances and challenges in analog IC design. Along with the development of consumer electronics, communication, computer and networks, the systems become more complicated and put more requirements to sub-blocks. The advances of amplifiers also improve the performance of systems. In a word, systems and amplifiers make progress with each other. Creating new architecture, improving amplifiers’ performance and studying amplifiers further are still very important.This paper designed a high precision low noise operational amplifier with applications aimed at filters and low noise. We first reviewd some basic noise knowledge and discuss how to reduce the noise and offset from the points of technology, devices and circuit architecture, which decide the input stage structure. For high voltage gain, the folded common emitter common base structure was adopted. For isolating the loads, improving and linearity, double bufferd structure was used. The peaking current source was employed to provide the current under controlled. Feedforward compensation was used to bypass the poor PNP transistors to increase the bandwidth and miller compensation with nulling resistor was applied to guarantee the stability.The bipolar technology of ASMC four micrometer was used. Hspice and Cadence was adopted to simulate the circuit and draw layout. The the circuit was taped out and tested. The simulation results showed that the equivalent input referred noised voltage was 2.465 nV(?), input offset voltage was 0.0146 mV, the DC gain was 131.1d B, the GBW was 6.06 MHz, the phaze margin was 51.7dB.The layout area was 4100 μm x 2590 μm. The amplifier has low noise and offset, which has achieved the specifications.