Research On Efficiency Enhancement And Linearization Techniques Of Radio Frequency Amplifiers

RF Amplifiers which include power amplifiers in the transmit chains and low noise amplifiers in the receive chains are the key modules of the transceivers in radar and wireless communication systems. Their stability is necessary for systems'normal op-eration and their performances directly affect the systems'quality. The current use of complex modulation techniques causes a high peak to average power ratio which re-quires the amplifiers to have sufficient linearity, and high working efficiency for the sake of green communications to minimize the power consumption. Therefore, effi-ciency enhancement and linearization techniques have been widely used for RF am-plifiers design. Based on the practical applications, the dissertation was focused on the efficiency and linearity of RF amplifiers.First, the common efficiency enhancement and linearization techniques were overviewed. Then the impedance matching methods were described in particular with detailed analysis of the differences between power matching and noise matching.Chapter three, four and five were focused on the efficiency and linearity optimi-zation methods for single transistor class F/IF power amplifiers,Doherty power am-plifiers and wideband low noise amplifiers respectively.1.Class F/IF power amplifier is one of the switch mode power amplifiers. With some theoretical introduction to its operation principle and the analysis of the influ-ences of the parasitic elements of the power transistor to the amplifier's performances, a parasitic compensation circuit was added into the harmonic control network at the output node to optimize the 2nd to 3rd or 2nd to 5th order harmonic impedances. The 2nd and 3rd order harmonic impedances were also matched at the input node, due to the existence of parasitic feedback elements. According to the proposed architecture, a high efficiency inverse class F power amplifier was realized to validate the design methods.2.Doherty power amplifier is able to keep high efficiency for a wide range of output power back off with the special biases for its two amplifiers. Based on the analysis of traditional Doherty power amplifiers, a Doherty circuit employing high efficiency inverse class F power amplifiers as its carrier and peaking amplifier was presented. By adding a tuning microstrip line, the original inverse class F power am-plifier achieved the optimized impedance and resulted in high efficiency of the Do- herty amplifier in the power back-off region. The bias setup of the peaking inverse class F power amplifier and its output characteristics in the large signal region were also analyzed. The operation state of the Doherty amplifier at saturation point was analyzed and explained. And the linearity of the new Doherty was found better than the original inverse class F power amplifier after nonlinear effects comparison.3.The CMOS low noise amplifier was studied in general. Based on a new type noise cancelling architecture, the origins of noises and the nonlinearity influences were analyzed, and a wideband low noise amplifier circuit was proposed. The noise performance was optimized while achieving good linearity simultaneously. A UWB CMOS low noise amplifier chip was designed to validate the methods.