1/f noise of MOS field effect transistors for analog circuit applications

The goal of this thesis is to investigate 1/f noise in MOS transistors and to explore how to optimize the noise performance of analog circuits. For this, fundamentals of 1/f noise in MOS transistors and 1/f noise models are studied. Since the existing models are either restricted for a specific region or insufficient to explain the behavior of the entire range of MOSFET operation, by extending these models, a new model which is sufficient for the entire range of MOSFET operation is proposed. To study the 1/f noise behavior, a wafer level 1/f noise measurement setup has been successfully constructed and demonstrated with effectively no pickup noise. Using the setup, 1/f noise of surface channel (SCH) NMOS and PMOS transistors fabricated in a 0.25 μm CMOS technology as a function of various parameters such as biases and geometries for the entire rage of MOSFET operation has been investigated and the results are qualitatively and quantitatively explained using the extended 1/f noise model. One of the most important results is that surface channel PMOS transistors still have about an order lower 1/f noise than NMOS transistors. Possible reasons for this are the difference of the transport parameters for electrons and holes. Using these characterization results, it is suggested that better noise performance of PMOS transistors be maintained and be utilized in analog circuits by choosing proper bias conditions. Another important result is that a reduction in 1/f noise by an order of magnitude can be achieved by applying a slight forward bias to the body-to-source junction for both NMOS and PMOS transistors in subthreshold. The 1/f noise data have been used to study the phase noise of 5.4 GHz differential VCO circuits using a time variant phase noise model. To do this, a procedure for estimating VCO phase noise using measured 1/f noise data has been demonstrated. Phase noise contribution from the core can be reduced by 8 dB using PMOS transistors rather than NMOS transistors. In addition, four different versions of base-band amplifiers are fabricated by exclusively using either PMOS or NMOS transistors and their performances are compared. Using PMOS transistors can reduce 1/f noise by about an order, forward biasing the body-to-source junction (only in subthreshold) can reduce by another order of magnitude, and increasing the gate area to keep current the same as NMOS transistors further reduces 1/f noise by about 5dB. Based on these results, it is proposed that using PMOS transistors in subthreshold with slight forward body bias, 1/f noise of base-band amplifiers can be reduced by 27 dB with negligible degradation in gain bandwidth product.