Font Size: a A A

The Design Of High-speed Type And Very Narrow Pulse Synthesis Module

Posted on:2017-03-10Degree:MasterType:Thesis
Country:ChinaCandidate:Z J XuFull Text:PDF
GTID:2308330485988018Subject:Instrumentation engineering
Abstract/Summary:PDF Full Text Request
As a kind of important testing tools in testing domain, pulse type generator is able to provide the system under test with pulse signal which is of characteristics of different frequency, pulse width, amplitude, working modes and trigger modes, it can also output pulse sequence which is editable arbitrarily by user.This paper studies with the goal of the high-speed pulse type generation and very narrow pulse synthesis technology, it has completed the timing module design of the pulse generator in the frequency range of 15 MHz~1.5 GHz with a variety of working modes, a variety of trigger modes, it has also achieved the function indexes of the minimum pulse width 200 ps, the maximum pulse width(cycle- 200 ps), the channel delay plus or minus 2ns, 2ps step of the pulse width and delay. The main work of this timing module is to complete the whole timing system design including realizing the index and performance of the pulse type synthesis parts and synthesizing and improving the module design roundly on the premise of ensuring the function and index of the pulse type generator. The specific work content including:1)Analyze the difficulties in system design and determine the whole design method of the high speed type and extremely narrow pulse generation.2)Analyze the key technology in timing module.Analyze the key technology in the process of realising the function of the timing module, it mainly includes synchronization design analysis in asynchronous clock domain, the data latch time-series analysis in transform from parallel data to serial data, timing constraint of the critical path, the FPGA internal timing optimization, the timing control of the transceiver, the transceiver transmission bandwidth analysis and so on, then further perfect the timing module design.3)Hardware circuit design and the timing logic design of the timing module.Study the data storage technology of high speed data and extremely narrow pulse, the normalization processing technology of pulse working modes and trigger modes; Complete the generation of high speed type with the technology using FPGA internal high-speed serial transceiver combined with external and string conversion circuit of serial data stream;Complete pulse synthesis with the technology using the precision delay technology of delay unit with the combination of a wide range of delay via high speed counter, using the implementation technology of picosecond level delay step.4)The debugging,testing and the result analysis of the timing module.Debug and improve of the timing logic design and the hardware circuit design,test the timing module and realise the function index requirements of the projects.This paper successfully completed the work content above, through the design and debug, the timing motherboard finally realizes the generation of 1.5 GHz pulse signal in various function modes,completes the minimum pulse width requirement of 200 ps,completes the related function and index requirements of the timing module of the pulse generator.
Keywords/Search Tags:High-speed pulse type, Very narrow pulse, Precise delay, Timing optimization
PDF Full Text Request
Related items