Design Of Reconfigurable Applied Specific Processor Main Controller

Reconfigurable computing architecture weighs the needs of the performance and versatility. It is expected to improve performance and versatility, as a third class research besides general-purpose processor and ASIC. RASP is a dedicated reconfigurable processor core.Based on studying many kinds of reconfigurable processors, this paper shows the design of RASP main controller and optimizes it.The main controller of RASP is responsible for parsing command. It controls overall scheduling to make sure that RASP can finish the calculation. Exchanging information between RASP and external DSP is mainly through the register group. The register group includes a 32-bit device configuration register,4 groups of 448-bit computing configuration registers, a 32-bit status register, a group of 320-bit interrupt and exception register, a 2-bit EJTAG handshake register, a 40-bit master mode starting address register.The main controller in this paper has many kinds of working styles.The work patterns of RASP include normal work mode and debug mode. The normal work mode includes master mode and slave mode. In master mode, RASP reads instructions from the L3 command district initiatively. In slave mode, DSP writes commands to RASP directly. Debug mode includes JTAG debug mode and DSP debug mode. In JTAG debug mode, data is exchanged through EJTAG channel. In DSP debug mode, data is exchanged through AXI channel.In order to improve calculating efficiency, RASP could achieve ping-pang operation. When RASP uses ping-pang function, allocation of storage resources is critical. RASP internal storage includes 32-bank data memory and 8-bank constant memory. These storage resources are divided into 2 parts.The storage selection is achieved by mem_sel which is a 3-bit signal.Ping-pang function could greatly improve efficiency. If transforming time nearly equals calculating time, efficiency improving will be more significant. For example a typical FFT algorithm, among 5 selected test samples, the maximum efficiency improving could get to 28.4%.