Research On The Implementation Of Frequency Synthesizer In Multi-channel High-speed Sampling

The 21 st century is the information age, which develops at top speed. In this age, the needs for electronic products are gradually increasing because of their great-leap-forward development. And requirements for them become higher and higher at the same time. As the most important part of electronic systems, the frequency synthesizer is the basic needs of all electronic products. The High-speed Sampling System is widely used in the modern communication field and military industry, as the core part of the system, performance of the sampling clock source determines the performance of the whole system. Therefore, it is significant to study the technology of frequency synthesis.This thesis mainly discusses the design of Frequency Synthesizer in the Multi-channel High-speed Sampling System. Firstly, it analyzes species of the frequency synthesis technology, and analyzes the basic principle of DDS and PLL and their respective characteristics theoretically. after a comprehensive comparison of advantages and disadvantages of DDS and PLL, advantages and disadvantages of the combination scheme, the final scheme was determined to the "DDS driven PLL" design according to system requirements, this scheme combines the advantages of DDS, which are the high resolution and conversion time, and the advantages of PLL, which are a wide range of output frequency and a perfect spurious rejection performance. The focus of the design is to ensure the accuracy of the final output signal. Under the condition, we make the output of the sampling clock meet the phase and spurious indicators requirements of sampling system, and with a wide range of output frequency.In this thesis, the author states in detail about the selection of key components and the mapping principles of the circuit system, and put forward an algorithm to reduce the stray multiple adjustment. The algorithm improves spurious performance of the frequency synthesizer’s final output signal by screening different parameter combinations of the same output frequency. It can achieve better spurious performance under high output rate and high resolution. Finally testing the frequency synthesizer and analyzing the testing results, after the final results verified the feasibility of the method described above frequency synthesizer in practical applications. This thesis proposes and solves the following key technologies:1. The specifications of frequency synthesizers are given based on the project requirements, and giving principles of selection of the schemes and devices.2. The frequency synthesizer which meets the requirements of sampling system is designed according to above principles.3. Implemented a multiple adjustment algorithm to reduce the stray combined with the theoretical analysis of the frequency synthesizer.