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Process And Device Design Of Pixel In TDI CMOS Image Sensor

Posted on:2013-06-25Degree:MasterType:Thesis
Country:ChinaCandidate:Y Q LiFull Text:PDF
GTID:2268330392470114Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the development of microelectronic technology, solid state image sensorhas been replaced the traditional film camera. Due to the improved characteristic ofCMOS image sensor, such as low cost, low power consumption, high integration andthe ability to integrate sensing with analog and digital processing down to the pixellevel, it has been the dominant of solid state image sensor. CMOS image sensor hasbeen widely used in digital still camera, digital video camera, industrial imaging,surveillance, scientific research, medical and smart phone. The four transistor (4T)pixel is the mainstream of the CMOS image sensor.Time Delay Integration (TDI) CMOS image sensor has the characteristic of highSNR and high sensitivity, widly applied in low light conditions, such as outer spacerand deep sea. Based on the GSMC0.18μm CMOS process, with the two-dimensionaland three-dimensional process simulation, this paper introduces the TDI CMOS4Tpixel process design. The pixel in TDI CMOS image sensor should use large sizepixel for the high fill factor and sensitivity. The difficulty in large size pixel is thecharge transfer efficiency. The charge transfer efficiency is determined by theelectrical potential distribution along the transfer path from Pinned photodiode (PPD)to Floating Diffusion (FD), including the PPD, the transfer transistor channel undertransfer gate, and the connecting region between them which is also under transfergate. Non-uniform doped transfer transistor channel is introduced to provide theascending electrical potential gradient in transfer transistor channel. With theadjustments to the non-uniform doped transfer transistor channel andanti-punch-through (APT) implantations, potential barrier and potential pocket in theconnecting region were reduced to improve the electrical potential connection. Thesimulation results show that the percentage of residual charges to total charges dropsfrom1/104to1/107, and the transfer time is reduced from500ns to110ns. Thismeans the charge transfer efficiency is improved.Based on the GSMC0.18μm CMOS process, this paper elaborate the tape outpixel process condition, including the design of Pinned Photodiode (PPD), the effectof Anti-Punch-Through implant to Full Well Capacity (FWC) and the robustness ofpixel process. The pixel layout, the test environment and the measure ment result ofFull Well Capacity and dark current are also included in this paper. The measurement result shows that basic function of4T pixel is completed, but the characteristic is stillneeds to be strengthened, especially the dark current.To sum up, this paper introduces the design of large size pixel applied in TDICMOS image sensor with the improved charge transfer efficiency. The taped outwafer turned that the basic function of pixel is completed. This paper can be used bythe pixel designer to improve charge transfer efficiency of4-T pixel, especially for thepixel in TDI CMOS image sensor and large size pixel.
Keywords/Search Tags:CMOS image sensor, TDI CMOS image sensor pixel, charge transferefficiency, tape out process condition, pixel measurement
PDF Full Text Request
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