Design Of FIR Filter Based On FPGA Reconfigurable Technology

The FIR digital filters are used more and more widely in the modern production tests and teaching experiments. With the improvement of technology and performance, the users require the FIR filters to have a high speed operational ability and to have adjustable cutoff frequency and filter type. In addition, the users often need the FIR filters whose filtering order can be changed online. However, the present FIR filters that have the above functions are always expensive. Aiming at this problem, this paper designs a low cost and high speed FIR filter, of which the filtering order can be changed online.In recent years, the manufacturing technology of integrated circuit develops rapidly. Meanwhile, the integration degree and operational speed of FPGA devices are improving continuously and the prices decline constantly. FPGA support online programming and can be extended easily. Additionally, FPGA is easy to transplant. Static reconfigurable technology which is based on FPGA is an advanced technology that has high performance and good flexibility. This technology has the advantages of fast computation speed and short development cycle. This paper combines the reconfigurable technology of FPGA with the device of CPLD and takes the device of CPLD as the MCU. The design in this paper is a comprehensive application of the FIR digital filter module, device of program memory, and analog-digital conversion circuit. The static reconfiguration scheme selected the structure that uses the devices of CPLD to match the devices of FLASH, which can convert the adjustment of filtering order to the adjustment of the filter module. This paper’s design can achieve the filtering of wider frequency band by changing the filter module in the device of FLASH. Additionally, this paper completes the design of filter module by adopting the algorithm of full-blown lookup table, which makes the speed of computation faster and makes full use of the hardware resources in filter system.The simulation results proved that filter order can be changed in the 2 to 6 integer power of 2 and can make the type of filter and cutoff frequency adjustable. The system achieves the expectations of the design and has stable performances.