Design Of Floating Point Division/Square Root Arithmetic Unit Based On SRT4 Algorithm

With the rapid development of computer and VLSI technology, the requirements of microprocessor floating-point algorithm performance is higher and higher. floating-point unit?FPU? has become an important index to measure the CPU performance. Division and square root algorithm is a relatively complex and big cycle time algorithm in floating-point unit?FPU?, is also an important aspect of influencing the FPU performances, so it is important and significant to design high performance floating-point division and square root unit. In order to improve processor performance and reduce delay, this paper detailedly calculates and designs the floating-point division/square root algorithm and structure, uses the SRT algorithm to achieve the operations of floating-point division/root instructions, and in SRT algorithm, it is the key to improve the design performance to design the high-powered of lookup table?LUT?, so this paper focuses on the design of the lookup table and calculates the minimum cycles to overlap the lookup table.First, this paper introduces the IEEE754 floating-point standard and studies several algorithm of adder as the basis, especially for Parallel Prefix Adders, this paper uses one of the Parallel Prefix Adders: BK Adder, then introduces two compressors: Carry Save Adder and 5₃ Count.Next content is the critical part, mainly includes three parts: 1.the divisor algorithm and structure; 2. the square root algorithm and structure; 3. combine the lookup table and fold it.At the first part, this paper first introduces the whole structure of divisor, then recommends the mathematical theory of division, improves the Quotient Digital Set to meet the requirements of truncation, and comes up with a new structure, after that this paper detailedly calculates the containment condition and continuity condition, adds an On_the_fly Rounding module to reduce the delay of creating quotient. At last, this paper researches the bit wide of lookup table to minimize the critical path delay.At the second part, this paper expounds the mathematical theory of square root and improves the structure to meet the requirements of square root, also calculates the containment condition and continuity condition, At last, this paper studies the bit wide of lookup table.At the third part, this paper combines the division lookup table with square roots, uses folding algorithm to reduce the lookup table, and determines the infeasibility to fold the lookup table directly, therefore, this paper come up with a new method with translation after folding, then this paper calculates the boundary conditions of lookup table and realizes the design of floating-point division/root operation.The conclusions of the paper basically come from the calculation, its reliability is high, and the train of thought is strict, it has high practical value.