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Research And Implementation Of Channel Encoding Based On FPGA

Posted on:2016-02-19Degree:MasterType:Thesis
Country:ChinaCandidate:J YuFull Text:PDF
GTID:2308330482464383Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
Channel encoding is an important part of data communication system, it is the mainly technology and method to transmit the information from the sending end to the receiving end reliably. However with the development of hardware and technology, of FPGA its internal resources are more abundant, the cost of developing digital circuit is gradually reduced, the development methods are more diverse and the used method is more flexible, so the channel encoding based on the FPGA platform has become a demand of reality.At first, the paper analyzes the practical needs of the project, designs the overall structure frame of the subject, and demonstrates the necessity and feasibility of using FPGA platform; then compiles the FPGA program based on Verilog language; finally, the Modelsim simulation platform is built to verify the function of the program and the sequential logic.This subject is based on the actual needs, designs and compiles the channel encoding of a date acquisition platform which is based on the platform of FPGA and compiled with Verilog. The main functions of this platform are: receiving the date information sent by the central processing module, then coding, modulating and sending it to the satellite according to the preset channel; receiving the configuration parameter information sent by the central processing module; send communication module own configuration parameter information, according to the request send it back to the central processor module. This platform is mainly lay in the harsh environment and sparsely populated areas such as mountains, islands, etc. This subject mainly studies how to design and implement channel encoding on FPGA platform. In the part of channel coding, this paper mainly researched on BCH code, convolutional code and RS code, then simulated them by MATLAB to verify the correctness of the encoding logic.
Keywords/Search Tags:FPGA, Channel encoding, BCH, Convolutional code, RS, Modelsim
PDF Full Text Request
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