Research Of New SOI High-voltage Devices Based On The Technology Of The Enhanced Field Electric Layer

SOI(Silicon On Insulator) high-voltage devices have developed rapidly due to its unique advantages. With the rapid development of high technology, new problems arise— The vertical breakdown voltages of SOI high-voltage devices are limited by some reasons. Many scientists have carried through much research on this problem.The method of enhancing electric filed of the dielectric layer to improve the breakdown voltage of SOI high-voltage devices is very effective. There are three main technologies to enhance electric filed of the dielectric layer—the use of ultra-thin top silicon, the introducing of new low-k dielectric layer and the introducing of interface charges, of which the most effective is the introducing of interface charges. On the current international, there are two ways to introduce interface charges in SOI devices:one is heavy ion interface fixed charges, the other is self-adaptive inversion interface charges. This paper presents a technology which enhances the dielectric layer electric field of SOI high-voltage device by introducing a high concentration of ionized donor.The technology improves the breakdown voltage of SOI devices and some models are obtained including the electric field of silicon and dielectric layer and breakdown voltage of devices. Based on this, Series of new device structure are designed which mainly include SIMOX buried oxide-based portion of the substrate N+ buried layer SOI high voltage device, interface N + silicon island series SOI high voltage device structure,based on thin buried oxide layer and the triple top layers of the silicon substrate SOI High Voltage LDMOS devices.1 Series SOI high voltage devices structures with interface N+ silicon islands.These devices are implanted N+ silicon islands with the same width, height and distance at the interface. When the device is in a blocking state, a lot of holes are accumulated between the adjacent interface N+ silicon islands and high concentration ionized donor positive charges are accumulated in the partly depleted N+ silicon islands. These accumulated positive charges enhance the electric field of buried layer greatly which improves the device breakdown effectively. These devices include:(1)1200V level thin silicon layer of P-channel SOI LDMOS devices, which achieve the high breakdown voltage of 1224 V with 2μm buried oxide layer and 1.5μm top silicon layer and the electric field of buried oxide layer reaches 600v/μm much higher than the conventional of 100v/μm;(2)INI PSOI LDMOS device;(3)Interface charge island PSOI N channelLDMOS device.② SOI high voltage device with a N+ buried layer based on SIMOX buried oxide(PBN SOI). Analytical mode of interface electric field is derived and it shows that the accumulation of interface trans holes and the partly depleted high concentration ionized donor positive charges of the interface N+ layer can effectively enhance the electric field of buried oxide layer, which improves the breakdown voltage. With 10μm top silicon and 0.375μm buried oxide layer, the breakdown voltage and the electric field of new structure are increased by 186.5% and 45.4% compared with the conventional structure of the same parameters.③ SOI High Voltage LDMOS devices based on a thin buried oxide layer and the triple top layers of the silicon(Triple-Layer Top Silicon, TLTS). A high concentration of n+ layer is introduced at the top silicon above the interface of dielectric layer. When the device is in a blocking state, the high concentration of n+ layer is partly depleted, and the high concentration ionized donor positive charges depleted at the drain side enhance the electric field of dielectric layer. The additional electric field modulates the electric field of drift region which prevents the previous breakdown at the drain side. Therefore high breakdown voltage can be obtained with thin dielectric layer. The device with0.375μm dielectric layer reaches a breakdown voltage of 624 V and acquires higher FOM value.