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ESD Devices Research And Optimization Based On BCD Process

Posted on:2016-11-10Degree:MasterType:Thesis
Country:ChinaCandidate:Y LiuFull Text:PDF
GTID:2308330473955667Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
As the development of IC, high voltage power integrate circuit prospers in the field of automotive electronics, display driver and etc. However, the ESD (Electrostatic Discharge) poses a great potential threat to IC. In BCD (Bipolar-CMOS-DMOS) process, Semiconductor devices operate in a situation of higher voltage, more harsh environment and process instability than conventional CMOS process.The research presented in this paper on ESD characteristic of related devces is based on 0.18μm 12V BCD process. The paper introduces some basic theory of ESD including basic ESD protection theory, ESD test model and ESD design window. Then, conventional ESD protection elements such as diodes, BJT, LDMOS and SCR devices follow.The nonuniform current effect of LDMOS device results in hot spot and heat distribution difficulty in the device. This is one of the reasons leading to low ESD failure level. In order to optimize and improve the ESD performance of LDMOS device, tape-out experiment and TLP test have been carried out. The TLP measurement demonstrates that the gate length of LDMOS exerts little influence upon the ESD performance. The salicid process neutralizes the ballasting effect of drain engineering. At last a LDMOS device embedded with SCR is presented as an effective device to improve LDMOS ESD performance. Specially, the ESD protection level of segmented SCR-LDMOS is positive correlation with the ratio of P+ area to N+ area.In regards to the large snap-back of conventional SCR device, efforts must be made to lower the triggering voltage and increase holding voltage. As to unidirection SCR, MLSCR and low triggering voltage SCR have been introduced and validated to lower the triggering voltage by TLP measurement. Then, the segmented SCR and HHV-SCR devices are proposed to increase the holding voltage. At last of unidirection SCR, an RC triggering SCR device demonstrates an I/V curve with no snap-back characteristic. Such RC-SCR can provide up to 9KV HBM protection level and be preferred as a clamp between VDD and VSS rail. At last, a bidirectional SCR device and its improvement have been presented to save layout area and cost.
Keywords/Search Tags:ESD, SCR, LDMOS, IC reliability
PDF Full Text Request
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