Research On Reliability Of High Voltage Thin Layer SOI LDMOS

SOI LDMOS devices provides fast switching time, loe power dissipation, dielectric isolation and ease of integration, widely applied in motor driver, power supplies, and automotive sector. The devices often work in high tempreture, heavy current and so on, so it is has very strong requirement for reliability of devices. In this thesis, failure machanism of thin layer SOI p LDMOS and n LDMOS in switching circuit. The degradation of electrical parameters is tested by KEITHLEY and some special failure is observed using 2-dimension simulator.1. reliability of the SOI high voltage thin layer pLDMOS deviceThe reliability of the SOI pLDMOS includes hot carrier injection effect, self-heating, interface charge between Si and SiO2 in this study. Stress test shows that the threshold and on-resistance of the device are increase and decrease respectively. It reveals degradation mechanism by simulation and chaige pump testing. The case of the threshold and on-resistance degradation are interface ststes and interface charge in gate oxide and in accumulation field oxide. Then, static and dynamic self-heating effect are researched. Static self-heating effect is investigated in the ON-state. Globe lattice temperature increases as drain applied voltage increases. Dynamic self-heating effect is investigated in the ON-OFF state. Globe lattice temperature is decided by time of the ON-state. After several cycles, the changes of the device temperature are gradually stable. Besides, The change of breakdown voltage, threshold voltage and resistance is discussed in the conditions of different interface charge between Si and SiO2.2. reliability of the SOI high voltage thin layer n LDMOS deviceThe relationship is studied between the breakdown voltage of the SOI high voltage thin layer n LDMOS and drift doping and the thickness of buried oxide. drift doping and the thickness of buried oxide are optimization by simulation. Self-heating effect is reseached in two aspects of static self-heat effect and dynamic self-heat effect as well as p LDMOS. Experiment shows that Hot Carrier Injection is weaker than pLDMOS.3.new structures of reducing the Hot Carrier InjectionHCI can be occurred in the end of channel and drift area for LDMOS. This paper proposes two structures to change the hot carrier injection effect, introducing lightly doping and high K dielectric layer in Corner region. The structure of introduced lightly doping in the corner region of STI considering process compatibility.