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The Research And Design Of 18-bit Sigma-Delta Modulator

Posted on:2015-07-10Degree:MasterType:Thesis
Country:ChinaCandidate:M ZhangFull Text:PDF
GTID:2308330473951794Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Sigma-Delta analog-to-digital converter(ADC) has a very wide range of applications, which span from low-frequency high-resolution data converters(like digital audio, sensor interfaces, and instrumentation, etc.) to medium-resolution broad-band wireless communications(like software radio direct conversion transceivers, digital intermediate-frequency receivers, etc.). Power dissipation is usually the main concern in these applications. Different applications may employ different Sigma-Delta modulator structures, but they may not be optimized against power dissipation. This is because it is very difficult to relate the parameters(for example, bandwidth, resolution, over-sampling ratio, etc.) of various structures to the power dissipation. Therefore, the objective of this work is to propose a way to build a relationship between these parameters and the power dissipation, which will be used in the power minimization design of the Sigma-Delta ADC.As these parameters and the power dissipation are closely related to the non-ideal factors that exist in the actual modulators, such as clock jitter, switched-capacitor thermal noise, finite gain of operational amplifier, etc, the relationship between them can thus be built upon these non-ideal factors. This relationship results in a formula that can be used to directly pick the optimal structure, which will be the best trade off between these parameters and the power dissipation. In addition, the time needed for designing the Sigma-Delta ADC can also be greatly reduced.For the purpose of verifying the feasibility of the derived formula, an optimal structure of an 18-bit Sigma-Delta modulator is first selected by the formula. This optimal structure is then realized by using conventional 0.25μm technology, with input signal bandwidth of 1kHz. The simulation results show that a dynamic range of 116.8dB, an effective number of bits of 19.12 bits, the power consumption of 425μW at 5 V supply are achieved. These results are close to the estimation performed by the formula. The comparison of the figure-of-merit with other structures shows that the chosen optimal structure achieved the best trade off.
Keywords/Search Tags:Sigma-Delta ADC, modulator, power dissipation, 18-bit
PDF Full Text Request
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