Design And Implementation Of 16-bit Low-power Delta-Sigma Modulator

Because of its high precision,high linearity and insensitivity to the circuit,the Delta-Sigma modulator is widely used in various semiconductor sensors and micro mechanical system sensors.In order to realize the miniaturization and portability of the sensor system,it is necessary to design a small size and low-power Delta-Sigma modulator.This paper focuses on the design and implementation of a low-power Delta-Sigma modulator,which can be used in sensor interface circuits.Firstly,the low power design technology of Delta Sigma modulator is investigated,and several low power design of Delta Sigma modulator are studied.The structure of various modulators is compared with power consumption,SNR,and the complexity of circuit design,finally,this paper use single loop filter and a 1-bit quantizer Delta Sigma modulation structure using op amp sharing technology was designed to design the modulator.The input and output swings of this structure are lower,insensitive to the nonideal characteristics of the circuit,so it is suitable to be used in low power design.The core curcuit-four stage integrators of the modulator,using the switched capacitor integrator,and the use of operational amplifier sharing technique,the integrator amplifier does not exist to be "idle" state,reduce the number of operational amplifiers used in the modulator to achieve the purpose of reducing consumption.The sample frequency of the modulator system is 3.072 MHz,the oversample rate is 128,and the signal bandwidth is 12 kHz.Layout design of Delta-Sigma modulator using SMIC 65 nm CMOS Technic,it follows top-down top-down design principles for layout design.The layout level simulation results show that when the input signal amplitude is 0.1V and the frequency is 3.3734 kHz,the noise floor of the Delta-Sigma modulator is about-100 dB,the SNDR is 90.2dB,and the power consumption is 503.57 ?W,which meets the design requirements.