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The Implementation Of Digital Baseband Converter Firmware And Monitoring System In Data Acquisition System

Posted on:2016-05-04Degree:MasterType:Thesis
Country:ChinaCandidate:J Y LiFull Text:PDF
GTID:2308330473462930Subject:Mechanical engineering
Abstract/Summary:PDF Full Text Request
In recent years, the technology of digital signal processing and FPGA develop quickly. Along with the progress of these techniques, various kinds of electronic equipment are faced with upgrading.In the field of VLBI, digital baseband conversion terminals are also facing the same situation.This article use a new generation of digital signal processing platform of Shanghai observatory for the development of the digital single sideband baseband conversion terminal.The design concept of the digital signal processing platform is the ADC+FPGA.The new generation of digital signal processing platform is configured with 2Gsps sampling rate of ADC chip in interleave mode. The theory of the maximum bandwidth is 1GHz, greatly improving the bandwidth of radio observations. In addition, the digital signal processing platform is equipped with kintex7 FPGA chip which is xilinx company’s latest series chips with high integration.The new generation digital baseband conversion terminal provides the basic conditions to realize more complex function. Digital SSB baseband conversion algorithm is implemented in FPGA.This algorithm use the real signal even channel segmentation technology, and fusion of polyphase filter groups, the IFFT and SSB conversion technology to realize digital single sideband baseband conversion efficient structure. Digital single sideband baseband conversion algorithm efficiently reduces the complexity of the FPGA design, and saves the FPGA resburces.In addition. This paper also involves in the design of a gigabit Ethernet based on LWIP protocol, EPC, interface, the design of XADC module and of FPGA muliboot. The Gigabit network design based on LWIP protocol provides communication between digital terminal and control computer, And EPC interface design provides communication function between the PowerPC processor and FPGA. FPGA multiboot function improved utilization of FPGA resources, reducing the design complexity, increasing the flexibility of the observation. XADC module design can real-time monitor the temperature of the FPGA chip and related voltage value. It will alert information when its value exceeds the specified threshold, which increases the security of the system.
Keywords/Search Tags:VLBI, baseband, embedded, data acquisition, FPGA, PowerPC
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