Base On The FPGA Hardware Gigabit Network Communication Design

With the high-speed development of industrial informatization and electronic, rapid transport to the site information and test and measurement become increasingly urgent demand. Now the data collection is widely used in national defense, army and other fields, new electronic si is a modular combination of hardware and software of the test plan. It will be the same part of the traditional test and measurement instruments of modularity, the variety of measurement functions integrated into a set of functional modules, through the software implementation of separate connection of hardware and software testing module and control, to achieve the function of one or more of the traditional test equipment, as a repeatable configuration of the system, it through a standardized interface to connect a series of basic hardware and software, provides a functional reorganization, extensible, interchangeable operation of general automatic test system platform.New electronic si data acquisition and interaction is the key of the instrument project, in the modern actual test measurements, after collect data at the scene of the complex, because of the complexity of the data, not at the scene of the data needed for processing, then you need to store data remote transmission and sent to the right terminal for data analysis.Traditional data transmission can not meet the requirements, this paper presents the hardware gigabit network communication scheme based on FPGA for the kop data storage provides a solution.This paper mainly through the UDP/IP + FPGA + DDR2 method implementation requirement, this paper USES the Xilinx company Virtex- 5 series FPGA chip as the master control chip, using VHDL hardware description language to gradation design of each module, at the same time using the FPGA design of DDR2 SDRAM memory controller control the reading and writing.Gigabit Ethernet data path to realize high speed data transmission, at the same time, good compatibility, connected to the PC interface is very convenient, at the same time design difficulty is not high, and the UDP protocol in network protocol type, this is because the agreement as a connectionless unreliable protocol resource consumption is small, processing the data transmission speed is very fast, good for fast data transmission.On the choice of memory use DDR2 SDRAM, because DDR2 SDRAM using 4 bit access technology, in the use of double along the sampling technique at the same time, the data clock double makes data rate is a core 4 times of working frequency, further improve the data bandwidth, satisfy the high speed of data storage.In this paper, on the basis of ISE Xilinx company hardware platform according to the topic request design a UDP/IP protocol stack and hardware protocol stack LUT the look-up table method, reduces the consumption of resources, improve the efficiency of data transmission.At the same time, combined with their own resources of IP soft core design EMAC module realizes the transport layer and physical layer during the data interaction.In this paper, and design the DDR2 SDRAM controller to control the memory data storage module, at the end of the paper also designs the data interaction module, Ethernet and DDR2 to realize the combination of data transmission and storage.In each function module design, the function of the whole system simulation, layout, logical analysis and debugging work, validate the correctness of this topic solution.