Font Size: a A A

Design And Verification Of Ethernet UDP/IP Processor Based On FPGA

Posted on:2016-07-25Degree:MasterType:Thesis
Country:ChinaCandidate:X T LiFull Text:PDF
GTID:2308330473457177Subject:Instrument Science and Technology
Abstract/Summary:PDF Full Text Request
With the development of network technology, transmission data with network is increasingly widely used, especially in video and audio transmission field which large amounts of data are needed to be transferred between devices and has a higher requirement on speed and real-time. However, the traditional software TCP/IP protocol is can’t meet the requirement of handling large amounts of data. In this regard, we design an UDP/IP processor based on FPGA to achieve high-speed data transmission.Based on the deeply studying of TCP/IP protocol, we design and realize the UDP/IP processor. Its has three main parts, namely, the UDP/IP protocol stack, the MAC controller and the system configuration module. UDP/IP protocol stack is responsible for user data pack and unpack in the transport layer and the network layer; MAC controller is to complete the link layer protocol functions; System configuration module will configure UDP/IP protocol stack, MAC controller and PHY chip via wishbone bus.The UDP/IP processor takes the full-duplex way to communicate in this paper. For the data transmission: user data are packed into UDP/IP data, and then passed to MAC controller. In MAC controller, data are combined with the Ethernet frame header and checksum, and then are transmitted to other network equipment by physical chip. For the data reception, MAC controller get data from PHY chip firstly, and then transmit to UDP/IP protocol stack to analysis and unpack the user data.After completing the design of the UDP/IP processor, we simulate it functions using software program, and then build the verification platform with Spartan-6 FPGA LX45 development board and PC. In the ALTYS development board communications end, we run UDP/IP processor realized in this paper and use serial serve as its application layer. In the PC communications end, we write communication test program and run it on Linux system. Tests prove the UDP/IP controller can send and receive data correctly. In addition, the transmission speed can reach 119MB/s(952Mbps). Visible, the UDP/IP controller designed can achieve Gbit data transmission.
Keywords/Search Tags:UDP /IP protocol, MAC protocol, Linux, FPGA, Gigabit Ethernet
PDF Full Text Request
Related items