The Application And Verification Of PCI-PLB Bridge Based On SoC Chip Of Core Connect Structure

So C chip design technology which refers to the microprocessor, IP core and memory(or storage control interface)integrated on a single chip has been rapid development over the past decades. With the complexity of So C chip design technology to further improve、shorten the time requirements and the design of single chip integration is higher and higher, many problems are brought for the IP core reusability.Such as IP core performance assessment, integration of IP cores in the So C interconnection, the verification of SoC chips after implementation and so on.The main contents are followed:Firstly, this article analyzes the characteristics and transport protocols of PCI bus and PLB bus. Then study the function of PCI-PLB bridge based on the PCI bus protocol and PLB bus protocol. And then realize the integration of PCI-PLB bridge and PCI bus and PLB bus in the process of So C chip integration. We designs the PCI function model including pci_bfm module, master_modle module, target_modle module and arbiter module in the fourth chapter. And then puts forward a PCI-PLB bridge functional verification plan, build simulation environment needed for the test. The analysis and study of the simulation environment include three parts: a single block of virtual simulation environment, system virtual simulation environment after implementation. Finally, the function simulation verification of PCI-PLB bridge, and study the result combined with manual function point in detail.Through the above work, this article realizes the normal communication with PCI devices and So C chip. PCI-PLB bridge has adaptive capacity in 33 MHz and 66 MHz clock. The function of PCI-PLB bridge can meet the requirements of PCI-side’s operation or PLB-side’s operation. The performance of PCI-PLB bridge can meet the application in So C chip. This paper also can guide the application of PCI-PLB bridge in subsequent projects.