The Verification Research On Signal Integrity Of Print Circuit Board Based On ODB

As the channel width of CMOS continues narrowing,and the number of transistors integrated on a single chip doubles roughly every two to three years, both the density and speed of the circuits design have been enhanced, which make it more difficult to design the high-speed circuit system, so that the importance of signal integrity stands out in the high-speed circuit design.Contract to the conventional circuit design that engineers rely mainly on circuit design experience and device manual to guide the design process, modern high-speed circuit designers use advanced EDA simulation tools to verify the correctness and accuracy of their design. Almost all the EDA tools for signal integrity simulation requires users to acquire a profound knowledge of signal integrity and circuit design rationale, what’s more, The simulation time of all the tools needed is too long to meet the rapid product design requirements of modern circuits. In addition, the current signal integrity simulation software has to be reset all the parameters every time for simulating the same problem on different circuit boards, which is not conducive to sharing among different engineers. In order to ensure that the engineers with the basic capability of circuit design but lacking of related signal integration acknowledge be able to verify the circuit signal integrity and minimize the checkout time, it is very necessary to develop a signal integrity verification tool which is simple to use, less time-consuming and supports different kinds of PCB design software. In order to meet the requirements above, this paper proposes a new printed circuit board signal integrity verification EDA software based on ODB++(Open Data Base), called PLV(PCB Layout Verify). Based on the analysis of the formats of PCB output files according to current mainstream EDA software, this paper propose an basic method by reading ODB++ format files which allows PLV software to display PCB designed by different EDA tools.The feasibility of signal integrity verification of PCB-based graphical information is verified through the analysis of the output file formats and the comparison of the simulation software HFSS(High Frequency Simulation Software), which is the industry standard. The accuracy of the PLV verification is examined by HFSS. Finally, a methodfreely to compile the rules is described, which is based on Python scripting language. The advantages and innovativeness of the signal integrity verification which is implemented in this article are as follows: Firstly, since the verification rules can be written by the signal integrity engineers and easily to learn, which solves the problem that signal integrity verification is always hard to get into. Secondly, each engineer can easily get started, and well written verification rules and they can be used by different engineers, so that the signal integrity verification rules and methods are well shared. Secondly, PLV software has the function of importing ODB++ files which most EDA design software can output, So that PLV can allow engineers to use different EDA software, which solves the EDA software diversity issues that engineers may come across. Thirdly, the signal integrity verification rules of PLV are based on empirical and theoretical rules, and the time it costs is quite little because it just use formulas, which solve the time-consuming problem occurred on the traditional signal integrity simulation software.Based on the above analysis, the verification software PLV based on ODB++, which can verify PCB signal integrity, is customizable and simple to use, and suitable for most circuits engineers to verify signal integrity. It meets the verification accuracy requirements of signal integrity, and reduces the time and human resources cost greatly, which is of great practical significance.