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The Research And Design Of A 16 Bit Sigma-Delta Modulator

Posted on:2016-07-11Degree:MasterType:Thesis
Country:ChinaCandidate:Y ZhangFull Text:PDF
GTID:2308330464458695Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
In order to increase the signal-to-noise ratio and performance, ??? ADC use over sampling technology, noise shaping technique, feedback and digital filtering technology, realize analog signal to digital signal conversion with high precision. It is widely used in the audio field.This thesis designs a modulator which can be used for the audio frequency field with 16 bit accuracy ??? ADC. First of all, the principle of ??? ADC is introduced. Through comparing of various structure of the ??? modulator, according to the design requirements, we select the 2-1 MASH structure as the structure of the ??? modulator designed in this thesis. Secondly, the quantizer bit, the sampling rate is determined, respectively. We select 1 bit quantizer and 128 OSR, to model and simulate the system through Matlab software. Thirdly, by discussing the non ideal factors of the ??? modulator, and simulating them with the help of Matlab Simulink module, we obtain a performance index for the design of amplifier. Finally, on the basis of the system design, we design each circuit part of the ??? modulator, and to simulate it using Cadence Spectre. The main new ideas in this thesis conclude:(1) we optimize system parameters and further obtain a optimized system structure by Matlab system modeling.(2) through the analysis of the non ideal factors of the system, we determine the performance index of the amplifier, and use the index to guide, optimize the structure of the circuits.(3) We adopt a low power, high speed latch comparator to improve the circuit performance.The ??? modulator designed in this paper based on Chrt 0.35μm standard CMOS technology, the bandwidth of the signal is 20 KHz, the sampling rate is 128, the sampling frequency is 5.12 MHz. The simulation results show that, the ??? modulator designed SNDR is 95.2 d B, the effective number of bits is 15.51 bit, which meet the design requirements.
Keywords/Search Tags:∑ -ΔADC, over sampling, noise shaping, ∑ -Δ modulator, MASH structure
PDF Full Text Request
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